Patents by Inventor Seok-Yeon Jeong

Seok-Yeon Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240177844
    Abstract: An operating room allocation apparatus may be provided. The apparatus according to an embodiment of the present disclosure may include: an information obtaining unit configured to obtain information about patient's entry and exit times in each operating room; a first calculation unit configured to calculate a utilization rate of the operating room for each certain time period based on the patient's entry and exit times; and a second calculation unit configured to receive certain time information from a user and calculate an average utilization rate by time period in the received time information.
    Type: Application
    Filed: November 21, 2023
    Publication date: May 30, 2024
    Inventors: Jung Hwan MOON, Ji Hye WOO, Jun Young CHOI, Ho Jun SEOL, Jae Kyun CHOI, Seok Doo JEONG, Chae Yeon PARK, Mi Ja JU, Ihn Seon LEE, Do Hoon LIM
  • Publication number: 20240078817
    Abstract: The present disclosure relates to a method and apparatus for generating a lane polyline by using a neural network model. The method according to an embodiment may extract a multi-scale image feature by using a base image obtained from at least one sensor loaded in a vehicle. According to the method, the multi-scale image feature is input to a first neural network model as input data and a BEV feature may be obtained as output data from the first neural network model. Also, according to the method, the BEV feature may be input to a second neural network model as input data and a polyline image with respect to a certain road may be obtained as output data from the second neural network model. In the present disclosure, a lane polyline obtained from the neural network may be utilized in vehicle control without going through an additional treatment process.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 7, 2024
    Inventors: Seok Woo JUNG, Hee Yeon KWON, Jung Hee KIM, Seong Gyun JEONG
  • Publication number: 20110131256
    Abstract: A memory card changer is disclosed. The memory card changer can include a connection unit, which interchanges the data with the host device, a slot unit, which attaches and detaches a plurality of memory cards and a processing unit, which controls the host device to recognize individual storage capacities of the memory cards individually or collectively, in which each of the plurality of memory cards have been inserted in the slot unit. The memory card changer of the present invention can use the plurality of memory cards having smaller storage capacities as memory of large capacity.
    Type: Application
    Filed: September 6, 2007
    Publication date: June 2, 2011
    Applicants: UNIDUE CO., LTD., CHUNGBUK TECHNOPARK
    Inventors: Chang-Ki Kim, Seung-Won Ahn, Seok-Yeon Jeong
  • Publication number: 20100312980
    Abstract: A memory card changer is disclosed. The memory card changer in accordance with an embodiment of the present invention can include a connector, which interchanges the data with a host device, a built-in memory; a slot, which attaches and detaches the plurality of external memory cards, and a processor, which controls the host device to collectively recognize or individually recognize individual storage capacities of the built-in memory and each of the memory cards inserted in the slot unit. In accordance with the present invention, the memory card changer can collectively manage individual storage capacities of the built-in memory and the plurality of external memory cards inserted in the memory card changer.
    Type: Application
    Filed: October 7, 2008
    Publication date: December 9, 2010
    Applicants: UNIDUE CO., LTD., CHUNGBUK TECHNOPARK
    Inventors: Seok-Yeon Jeong, Seung-Koo Lew, Jun-Woo Lee
  • Patent number: 5949258
    Abstract: A data holding circuit is provided that reduces a setup time and hold time when a data is inputted to effectively transmit output data. The data holding circuit includes a latch unit that samples and holds input data, a delay unit that delays a control signal, and a three-phase buffer. The three-phase buffer is enabled based on a delayed control signal from the delay unit to hold data from the latch unit LAT and to transmit output data.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: September 7, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Seok-Yeon Jeong