Abstract: A semiconductor integrated circuit includes a plurality of data output pins, a data processing circuit to generate output signals responsive to an input signal, and an output selection circuit with at least a normal mode and a test mode. A first group of output signals are provided to a first group of data output pins in a first test cycle of the test mode. And a second group of output signals are provided to a second group of data output pins during a second test cycle of the test mode. The semiconductor integrated circuit can be tested by means of a test device having less test pins than the output pins of the semiconductor integrated circuit under test.

Abstract: A semiconductor integrated circuit comprises a plurality of data output pins, a test pin, a data processing circuit for generating output signals in response to input signals, and an output circuit for outputting the output signals to the data output pins in a normal mode and sequentially outputting each of the output signals to the test pin in response to a clock signal in a test mode. The test device includes only one test pin and the semiconductor integrated circuit may be tested by connecting the test pin of the test device to the test pin of the semiconductor integrated circuit. That is, the test device including only one test pin can test the semiconductor integrated circuit with n output pins.

Abstract: A semiconductor integrated circuit includes a plurality of data output pins, a data processing circuit to generate output signals responsive to an input signal, and an output selection circuit with at least a normal mode and a test mode. A first group of output signals are provided to a first group of data output pins in a first test cycle of the test mode. And a second group of output signals are provided to a second group of data output pins during a second test cycle of the test mode. The semiconductor integrated circuit can be tested by means of a test device having less test pins than the output pins of the semiconductor integrated circuit under test.

Abstract: A semiconductor integrated circuit comprises a plurality of data output pins, a test pin, a data processing circuit for generating output signals in response to input signals, and an output circuit for outputting the output signals to the data output pins in a normal mode and sequentially outputting each of the output signals to the test pin in response to a clock signal in a test mode. The test device includes only one test pin and the semiconductor integrated circuit may be tested by connecting the test pin of the test device to the test pin of the semiconductor integrated circuit. That is, the test device including only one test pin can test the semiconductor integrated circuit with n output pins.