Abstract: A socket pin for a test apparatus. The socket pin may have self-cleaning function and may include a main body of a socket, a bottom contact tip at a lower portion of the main body, a first spring in the main body and connected to the bottom contact tip, a top contact tip at an upper portion of the main body, and a conductive contact ball at end of the top contact tip.

Abstract: In an example embodiment, an insert having an independently movable latch mechanism for loading a semiconductor package may include an insert body having a pocket, latch units installed at opposite sides of the pocket, and a press plate elastically installed above the insert body. The latch units prevent a loaded semiconductor package from escaping out of the pocket. The press plate may operate the latch unit by movement relative to an upper surface of the insert body. Each latch may be movably connected to the insert body such that a first end of the latch is rotatable around a fixed shaft pin. A second end of the latch may be movable into and out of the pocket. The latch may have a front surface slanted downwards towards the center of the pocket and have a guide hole near the back surface, opposite the front surface.

Abstract: Provided is electrical test equipment and method for testing semiconductor packages in an in-tray state. The equipment may include a loading site configured to receive a customer tray having a plurality of semiconductor packages therein, a test site configured to align the customer tray, and also configured to test all the plurality of semiconductor packages in the customer tray in-situ, a sorting site configured to sort the tested plurality of semiconductor packages in the customer tray, and an unloading site configured to unload the sorted plurality of semiconductor packages in the customer tray.

Abstract: The present invention relates to an insert block for testing semiconductor devices. The insert block comprises one or more pushers, installed in a block body having a loading space to accommodate a semiconductor device under test, including a first push rod to apply force to one of adjacent sides of the semiconductor device under test and a second push rod to apply force to the other thereof. Accordingly, firm centering of semiconductor devices under test relative to the contact pins of the test socket along the two perpendicular axes (for instance, x and y axes) on the top or bottom surface of the semiconductor device is achieved and leads to the proper interfaces between the external terminals of the semiconductor device under test and the contact pins of the test socket, and thereby improves the quality of connection therebetween.

Abstract: A POGO pin that can measure low frequency products as well as RF products and also have a long life span, and a test socket including the POGO pin are provided. The POGO pin includes a metal plunger formed of a conductive metal so as to electrically contact the semiconductor package, and a rubber contact pin connected with the metal plunger and formed of a conductive rubber so as to electrically contact the test board.

Abstract: An apparatus includes a test board for testing electrical characteristics of the semiconductor chip; socket pins vertically disposed on the test board to electrically connect the test board, and external terminals of the semiconductor chip; socket springs interposed between the socket pins and the test board and making the socket pins vertically elastic; a plurality of laser beam transmitters vertically penetrating the socket pins, the socket springs, and the test board; and a laser beam source supplying laser beams to the laser beam transmitters.

Abstract: The present invention relates to an insert block for testing semiconductor devices. The insert block comprises one or more pushers, installed in a block body having a loading space to accommodate a semiconductor device under test, including a first push rod to apply force to one of adjacent sides of the semiconductor device under test and a second push rod to apply force to the other thereof. Accordingly, firm centering of semiconductor devices under test relative to the contact pins of the test socket along the two perpendicular axes (for instance, x and y axes) on the top or bottom surface of the semiconductor device is achieved and leads to the proper interfaces between the external terminals of the semiconductor device under test and the contact pins of the test socket, and thereby improves the quality of connection therebetween.