Abstract: Trench MOSFET with self-aligned body contact with spacer. In accordance with an embodiment of the present invention, a plurality of gate trenches are formed into a semiconductor substrate. A body contact trench is formed into the semiconductor substrate in a mesa between the gate trenches. Spacers are deposited on sidewalls of the body contact trench. An ohmic body contact is implanted into the semiconductor substrate through the body contact trench utilizing the spacers to self-align the implant. A body contact trench extension may be etched into the semiconductor substrate through the body contact trench utilizing the spacers to self-align the etch, prior to the implant.

Abstract: Trench MOSFET with self-aligned body contact with spacer. In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor substrate, and at least two gate trenches formed in the semiconductor substrate. Each of the trenches comprises a gate electrode. The semiconductor device also includes a body contact trench formed in the semiconductor substrate between the gate trenches. The body contact trench has a lower width at the bottom of the body contact trench and an ohmic body contact implant beneath the body contact trench. The horizontal extent of the ohmic body contact implant is not greater than the lower width of the body contact trench.

Abstract: Trench MOSFET with self-aligned body contact with spacer. In accordance with an embodiment of the present invention, a plurality of gate trenches are formed into a semiconductor substrate. A body contact trench is formed into the semiconductor substrate in a mesa between the gate trenches. Spacers are deposited on sidewalls of the body contact trench. An ohmic body contact is implanted into the semiconductor substrate through the body contact trench utilizing the spacers to self-align the implant. A body contact trench extension may be etched into the semiconductor substrate through the body contact trench utilizing the spacers to self-align the etch, prior to the implant.

Abstract: Trench MOSFET with self-aligned body contact with spacer. In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor substrate, and at least two gate trenches formed in the semiconductor substrate. Each of the trenches comprises a gate electrode. The semiconductor device also includes a body contact trench formed in the semiconductor substrate between the gate trenches. The body contact trench has a lower width at the bottom of the body contact trench and an ohmic body contact implant beneath the body contact trench. The horizontal extent of the ohmic body contact implant is at least the lower width of the body contact trench.

Abstract: Semiconductor devices and methods for making such devices that contain a 3D channel architecture are described. The 3D channel architecture is formed using a dual trench structure containing with a plurality of lower trenches extending in an x and y directional channels and separated by a mesa and an upper trench extending in a y direction and located in an upper portion of the substrate proximate a source region. Thus, smaller pillar trenches are formed within the main line-shaped trench. Such an architecture generates additional channel regions which are aligned substantially perpendicular to the conventional line-shaped channels. The channel regions, both conventional and perpendicular, are electrically connected by their corner and top regions to produce higher current flow in all three dimensions. With such a configuration, higher channel density, a stronger inversion layer, and a more uniform threshold distribution can be obtained for the semiconductor device. Other embodiments are described.

Abstract: Semiconductor devices and methods for making such devices that contain a 3D channel architecture are described. The 3D channel architecture is formed using a dual trench structure containing with a plurality of lower trenches extending in an x and y directional channels and separated by a mesa and an upper trench extending in a y direction and located in an upper portion of the substrate proximate a source region. Thus, smaller pillar trenches are formed within the main line-shaped trench. Such an architecture generates additional channel regions which are aligned substantially perpendicular to the conventional line-shaped channels. The channel regions, both conventional and perpendicular, are electrically connected by their corner and top regions to produce higher current flow in all three dimensions. With such a configuration, higher channel density, a stronger inversion layer, and a more uniform threshold distribution can be obtained for the semiconductor device. Other embodiments are described.