Abstract: A vertical memory device includes: a gate electrode structure including a ground selection line (GSL), a word line and a string selection line (SSL) sequentially stacked on a substrate in a first direction substantially perpendicular to an upper surface of the substrate; and a channel extending through the gate electrode structure in the first direction, wherein the GSL has a doped polysilicon pattern and a first metal pattern including a metal or a metal silicide, and the doped polysilicon pattern and the first metal pattern are stacked in the first direction, and wherein each of the word line and the SSL has a second metal pattern including a metal.