Abstract: Disclosed are an apparatus and a method for Internet of Things (IoT) device security. The method includes unifying a port in a first IoT device for communication, receiving, by the first IoT device, a packet from a second IoT device through the port, identifying whether the packet in the first IoT device is in a preset packet form, verifying content of the packet in the first IoT device when the packet is in the preset packet form, and opening the port for providing a service in the first IoT device when the verifying of the packet content is successful.

Abstract: A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that vertical to a top surface of the substrate, a plurality of gate lines and a conductive line on the substrate. The gate lines are stacked on top of each other. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction. The conductive line cuts the gate lines along the first direction. A width of the conductive line is periodically and repeatedly changed.

Abstract: A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that vertical to a top surface of the substrate, a plurality of gate lines and a conductive line on the substrate. The gate lines are stacked on top of each other. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction. The conductive line cuts the gate lines along the first direction. A width of the conductive line is periodically and repeatedly changed.

Abstract: A semiconductor device includes a substrate, gate electrodes and interlayer insulating layers alternately stacked on the substrate, channel regions penetrating through the gate electrodes and the interlayer insulating layers, a conductive layer penetrating through the gate electrodes and the interlayer insulating layers, an insulating layer covering an upper surface of the conductive layer, a contact plug penetrating through the insulating layer and connected to the conductive layer, and an air gap formed in the conductive layer. The conductive layer is connected to the substrate and extends between two groups of the channel regions. The air gap is defined by the contact plug, insulating layer and an inner sidewall of the conductive layer.

Abstract: A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that vertical to a top surface of the substrate, a plurality of gate lines and a conductive line on the substrate. The gate lines are stacked on top of each other. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction. The conductive line cuts the gate lines along the first direction. A width of the conductive line is periodically and repeatedly changed.

Abstract: A semiconductor device includes a substrate, gate electrodes and interlayer insulating layers alternately stacked on the substrate, channel regions penetrating through the gate electrodes and the interlayer insulating layers, a conductive layer penetrating through the gate electrodes and the interlayer insulating layers, an insulating layer covering an upper surface of the conductive layer, a contact plug penetrating through the insulating layer and connected to the conductive layer, and an air gap formed in the conductive layer. The conductive layer is connected to the substrate and extends between two groups of the channel regions. The air gap is defined by the contact plug, insulating layer and an inner sidewall of the conductive layer.