Patents by Inventor Seon Wook Kim

Seon Wook Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200024512
    Abstract: A quantum dot including a semiconductor nanocrystal core and a semiconductor nanocrystal shell disposed on the core and does not include cadmium, wherein the core includes a Group III-V compound, the quantum dot has a maximum photoluminescence peak in a green light wavelength region, a full width at half maximum (FWHM) of the maximum photoluminescence peak is less than about 50 nanometers (nm), and a difference between a wavelength of the maximum photoluminescence peak and a first absorption peak wavelength of the quantum dot is less than or equal to about 25 nanometers, and a production method thereof.
    Type: Application
    Filed: July 23, 2019
    Publication date: January 23, 2020
    Inventors: Jihyun MIN, Seon-Yeong KIM, Eun Joo JANG, Hyo Sook JANG, Soo Kyung KWON, Yong Wook KIM
  • Patent number: 10530571
    Abstract: A secure communication apparatus may include a security module for generating an encrypted bitstream by encrypting at least a portion of data forming a bitstream and inserting at least a portion of key information used in the encryption into the bitstream and for decrypting encrypted data by acquiring at least a portion of key information for the decryption from a received encrypted bitstream, and a communication module for transmitting and receiving the encrypted bitstream.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: January 7, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han-gil Moon, Hyun-wook Kim, Seon-ho Hwang
  • Patent number: 10402325
    Abstract: A memory system may include a first cache memory including a plurality of regions, which are accessed using a first address, and in each of which an indication of whether cached data is present and a second address are stored. A memory system may also include a second cache memory configured to be accessed using the second address stored in an accessed region of the first cache memory when, as a result of an access of the first cache memory, cached data is present. Still further, a memory system may include a main memory configured to be accessed using the first address when, as the result of the access of the first cache memory, cached data is not present.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: September 3, 2019
    Assignees: SK hynix Inc., Korea University Research and Business Foundation
    Inventors: Ho-Kyoon Lee, Il Park, Seon-Wook Kim
  • Publication number: 20190262412
    Abstract: The present invention relates to a composition for preventing or treating obesity containing an ethanolic extract of Ramulus mori as an active ingredient. As the present invention contains an ethanolic extract of Ramulus mori, extracted from natural substance Ramulus mori, as an active ingredient, the present invention may prevent or treat obesity by inhibiting lipid accumulation in adipocytes without any side effects to a human body and inhibiting preadipocytes from being differentiated into adipocytes.
    Type: Application
    Filed: October 18, 2017
    Publication date: August 29, 2019
    Applicant: Korea University Research and Business Foundation
    Inventors: Young Hee LIM, Seon Wook HWANG, Jeung Keun KIM, Jun Ho KIM
  • Patent number: 10372563
    Abstract: Disclosed are an analyzing system for managing an information storage table and a control method thereof. That is, each of the physical basic regions, which are units of hashing an information storage position, is divided into a plurality of physical sub regions having same size. Then, a combination of virtual basic regions which satisfy a predetermined target value is checked from all configurable combinations and a hash value related with the combination of the virtual basic regions which satisfies the checked target value is stored in a predetermined region of a memory. Therefore, even though an information storage space required for every unit region is overloaded, when there is an extra information storage space in another region, the information storage space having an extra space is used to maximize efficiency of the information storage space.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: August 6, 2019
    Assignee: Korea University Research and Business Foundation
    Inventors: Seon Wook Kim, Ho Kwon Kim, Jae Yung Jun, Young Sun Han
  • Patent number: 10325672
    Abstract: Disclosed are a memory apparatus having a plurality of information storage tables managed by separate virtual regions and a control method thereof. That is, a fault repair is applied in a memory system having a plurality of information storage tables managed by a separate virtual region, so that the entire information storage space is uniformly used for every region to improve a performance of the entire system and maximize efficiency of the information storage space by utilizing the information storage space.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: June 18, 2019
    Assignee: Korea University Research and Business Foundation
    Inventors: Seon Wook Kim, Ho Kwon Kim, Jae Yung Jun, Kyu Hyun Choi, Young Sun Han
  • Patent number: 10310940
    Abstract: A method for extending the lifetime of a resistive change memory includes generating data and hash candidates by shuffling bit positions of write data with the hash candidates in response to a write request for the resistive change memory, calculating Hamming distances of the generated data and hash candidates from stored data and a stored hash, matching stuck data at a predetermined bit in the resistive change memory with the generated data and hash candidates when the stuck data is at the predetermined bit, and excluding mismatched data and hash candidates that are mismatched with the stuck data among the generated data and hash candidates, finding a data and hash candidate with the shortest Hamming distance among the matched data and hash candidates, and choosing the found data and hash candidate as an encoded data and hash, and storing the encoded data and hash in the resistive change memory.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: June 4, 2019
    Assignees: SK HYNIX INC., KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Seon Wook Kim, Miseon Han, Hokyoon Lee, Il Park
  • Patent number: 10176060
    Abstract: Provided are a memory apparatus for applying fault repair based on a physical region and a virtual region and a control method thereof. That is, the fault repair is applied based on the physical region and the virtual region which use an information storage table of a virtual basic region using a hash function, thereby improving efficiency of the fault repair.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: January 8, 2019
    Assignee: Korea University Research and Business Foundation
    Inventors: Seon Wook Kim, Ho Kwon Kim, Jae Yung Jun, Kyu Hyun Choi
  • Publication number: 20180217774
    Abstract: Disclosed are a virtual memory management apparatus for avoiding error cells in a main memory and a method thereof. That is, according to the present invention, it is possible to prevent a data loss or malfunction from occurring by allocating and releasing a stack frame in a way a block including the error cells to be located between the stack frames in case of a stack region, processing the block including the error cells to be in an allocated state in a heap region memory management data structure in case of a heap region, allocating the pages including error cells to programs not used frequently via profile in case of code memory, and allocating physical memory page including the error cells to unused space of last page in case of file-mapped memory.
    Type: Application
    Filed: April 7, 2017
    Publication date: August 2, 2018
    Applicant: Korea University Research and Business Foundation
    Inventors: Seon Wook KIM, Yoonah PAIK, Jae Yung JUN
  • Publication number: 20180047459
    Abstract: Disclosed are a memory apparatus having a plurality of information storage tables managed by separate virtual regions and a control method thereof. That is, a fault repair is applied in a memory system having a plurality of information storage tables managed by a separate virtual region, so that the entire information storage space is uniformly used for every region to improve a performance of the entire system and maximize efficiency of the information storage space by utilizing the information storage space.
    Type: Application
    Filed: April 13, 2017
    Publication date: February 15, 2018
    Applicant: Korea University Research and Business Foundation
    Inventors: Seon Wook Kim, Ho Kwon Kim, Jae Yung Jun, Kyu Hyun Choi, Young Sun Han
  • Publication number: 20180039539
    Abstract: A method for extending the lifetime of a resistive change memory includes generating data and hash candidates by shuffling bit positions of write data with the hash candidates in response to a write request for the resistive change memory, calculating Hamming distances of the generated data and hash candidates from stored data and a stored hash, matching stuck data at a predetermined bit in the resistive change memory with the generated data and hash candidates when the stuck data is at the predetermined bit, and excluding mismatched data and hash candidates that are mismatched with the stuck data among the generated data and hash candidates, finding a data and hash candidate with the shortest Hamming distance among the matched data and hash candidates, and choosing the found data and hash candidate as an encoded data and hash, and storing the encoded data and hash in the resistive change memory.
    Type: Application
    Filed: July 3, 2017
    Publication date: February 8, 2018
    Inventors: Seon Wook KIM, Miseon HAN, Hokyoon LEE, IL PARK
  • Publication number: 20180011770
    Abstract: Disclosed are a memory management system and a method thereof. Restricted spare cells are optimally distributed (or allocated) into a physical region and a virtual region in a system for repairing a fault of a memory, thereby increasing a yield of a memory chip.
    Type: Application
    Filed: July 5, 2017
    Publication date: January 11, 2018
    Applicant: Korea University Research and Business Foundation
    Inventors: Seon Wook Kim, Ho Kwon Kim, Jae Yung Jun, Kyu Hyun Choi
  • Publication number: 20170371753
    Abstract: Provided are a memory apparatus for applying fault repair based on a physical region and a virtual region and a control method thereof. That is, the fault repair is applied based on the physical region and the virtual region which use an information storage table of a virtual basic region using a hash function, thereby improving efficiency of the fault repair.
    Type: Application
    Filed: January 30, 2017
    Publication date: December 28, 2017
    Applicant: Korea University Research and Business Foundation
    Inventors: Seon Wook Kim, Ho Kwon Kim, Jae Yung Jun, Kyu Hyun Choi
  • Publication number: 20170364420
    Abstract: Disclosed are an analyzing system for managing an information storage table and a control method thereof. That is, each of the physical basic regions, which are units of hashing an information storage position, is divided into a plurality of physical sub regions having same size. Then, a combination of virtual basic regions which satisfy a predetermined target value is checked from all configurable combinations and a hash value related with the combination of the virtual basic regions which satisfies the checked target value is stored in a predetermined region of a memory. Therefore, even though an information storage space required for every unit region is overloaded, when there is an extra information storage space in another region, the information storage space having an extra space is used to maximize efficiency of the information storage space.
    Type: Application
    Filed: January 30, 2017
    Publication date: December 21, 2017
    Applicant: Korea University Research and Business Foundation
    Inventors: Seon Wook Kim, Ho Kwon Kim, Jae Yung Jun, Young Sun Han
  • Patent number: 9824029
    Abstract: A memory device includes: a main block that includes a plurality of first pages that are accessible based on a multi-bit address; and a sub-block that includes a plurality of second pages that are accessible based on a portion of bits of the multi-bit address, and stores a replacement data for replacing entire or a portion of the data of an accessed first page among the plurality of the first pages in a second page that stores the same tags as the other bits of the multi-bit address among the accessed second pages.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: November 21, 2017
    Assignees: SK Hynix Inc., Korea University Research and Business Foundation
    Inventors: Ho-Kyoon Lee, Il Park, Seon-Wook Kim
  • Publication number: 20170270054
    Abstract: A memory device includes: a main block that includes a plurality of first pages that are accessible based on a multi-bit address; and a sub-block that includes a plurality of second pages that are accessible based on a portion of bits of the multi-bit address, and stores a replacement data for replacing entire or a portion of the data of an accessed first page among the plurality of the first pages in a second page that stores the same tags as the other bits of the multi-bit address among the accessed second pages.
    Type: Application
    Filed: October 25, 2016
    Publication date: September 21, 2017
    Inventors: Ho-Kyoon LEE, Il PARK, Seon-Wook KIM
  • Publication number: 20170185513
    Abstract: A memory system may include a first cache memory including a plurality of regions, which are accessed using a first address, and in each of which an indication of whether cached data is present and a second address are stored. A memory system may also include a second cache memory configured to be accessed using the second address stored in an accessed region of the first cache memory when, as a result of an access of the first cache memory, cached data is present. Still further, a memory system may include a main memory configured to be accessed using the first address when, as the result of the access of the first cache memory, cached data is not present.
    Type: Application
    Filed: November 4, 2016
    Publication date: June 29, 2017
    Inventors: Ho-Kyoon LEE, Il PARK, Seon-Wook KIM
  • Patent number: 9136977
    Abstract: This invention relates to a data transmission method in a passive communication system being wirelessly powered up and being passively operable, without using its own power, for data transmission and reception, such as in a passive RFID (Radio Frequency IDentification) communication system, which is capable of effectively configuring a message transmitted by a passive device, thereby providing improved transmission efficiency.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: September 15, 2015
    Assignee: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Seon Wook Kim, Jong-Ok Kim, Seok Joong Hwang
  • Patent number: 8902047
    Abstract: Provided are a radio frequency identification (RFID) system including an RFID reading apparatus and a passive RFID tag and a method of transferring and/or processing data using the same. An RFID reading apparatus includes a data input unit which receives data to be transferred to a passive RFID tag, a control unit which generates a transmission packet containing the data and a command directing data transfer, and a communication unit which converts the generated transmission packet into an RF signal and transfers the converted RF signal to the passive RFID tag.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: December 2, 2014
    Assignees: Samsung Electronics Co., Ltd., Korea University Industrial & Academic Collaboration Foundation
    Inventors: Ja-nam Ku, Seon-wook Kim, Joon-goo Lee
  • Patent number: 8873532
    Abstract: An apparatus and a method for a random access scheme for multi-channel in a wireless communication system are provided. The method for performing the random access scheme for the multi-channel in the wireless communication system includes randomly generating a backoff counter value to transmit data; adjusting the backoff counter value by taking into account status of a plurality of idle subcarrier sets per backoff slot; when the backoff counter value becomes zero, selecting one or more subcarrier sets to carry the data from the idle subcarrier sets; and transmitting the data through the selected one or more subcarrier sets. The data collision probability between the terminals can be lowered, the channel utility can be enhanced, the transfer rate in the single-channel random access scheme can be raised, and the consumption of the radio resource can be reduced without using signals for the band request and allocation.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: October 28, 2014
    Assignees: Samsung Electronics Co., Ltd., Seoul National University Industry Foundation
    Inventors: Ho-Joong Kwon, Han-Byul Seo, Seon-Wook Kim, Byeong-Gi Lee, Jong-Hyung Kwun, Ok-Seon Lee