Abstract: Disclosed are a source driver and a method of detecting crack of a display panel. A source driver may comprise a first circuit configured to apply first data to data lines connected to sub-pixels of a display panel to charge a first driving voltage; and a second circuit formed on the display panel that applies the first driving voltage to a detection line formed on the display panel to detect the presence of cracks in the display panel based on the illumination status of the sub-pixels, wherein the detection line includes a first detection node and a second detection node formed on one side of the display panel along its extension direction, wherein the first detection node is connected to data lines of the first and third sub-pixels, and wherein the second detection node is connected to data line of the second sub-pixel.

Abstract: A semiconductor package may include a substrate having a first surface and a second surface facing away from the first surface, a window defined through a center portion of the substrate, and a plurality of first bond fingers, a plurality of second bond fingers, and a plurality of external electrodes arranged on the second surface; two or more first semiconductor chips each having a plurality of first bonding pads arranged adjacent to edges of the first semiconductor chips, and each of the first semiconductor chips separately attached to the first surface of the substrate in a face-down type position exposing the first bonding pads; and a second semiconductor chip having a plurality of second bonding pads arranged at a center portion of the second semiconductor chip, and attached to each of the first semiconductor chips in a face-down type position exposing the second bonding pads through the window.

Abstract: A semiconductor package may include a substrate having a first surface and a second surface facing away from the first surface, a window defined through a center portion of the substrate, and a plurality of first bond fingers, a plurality of second bond fingers, and a plurality of external electrodes arranged on the second surface; two or more first semiconductor chips each having a plurality of first bonding pads arranged adjacent to edges of the first semiconductor chips, and each of the first semiconductor chips separately attached to the first surface of the substrate in a face-down type position exposing the first bonding pads; and a second semiconductor chip having a plurality of second bonding pads arranged at a center portion of the second semiconductor chip, and attached to each of the first semiconductor chips in a face-down type position exposing the second bonding pads through the window.

Abstract: An electronic device package includes a bump having a post disposed on a contact portion of a semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; an interconnection portion having a locking portion that substantially surrounds the enlarged portion and an upper sidewall of the post; and a dielectric layer substantially surrounding the bump and the locking portion to separate the interconnection portion from the semiconductor chip.

Abstract: An electronic device package includes a bump having a post disposed on a contact portion of a semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; an interconnection portion having a locking portion that substantially surrounds the enlarged portion and an upper sidewall of the post; and a dielectric layer substantially surrounding the bump and the locking portion to separate the interconnection portion from the semiconductor chip.

Abstract: An electronic device package includes a bump having a post disposed on a contact portion of a semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; an interconnection portion having a locking portion that substantially surrounds the enlarged portion and an upper sidewall of the post; and a dielectric layer substantially surrounding the bump and the locking portion to separate the interconnection portion from the semiconductor chip.

Abstract: An electronic device package includes a bump having a post disposed on a contact portion of a semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; an interconnection portion having a locking portion that substantially surrounds the enlarged portion and an upper sidewall of the post; and a dielectric layer substantially surrounding the bump and the locking portion to separate the interconnection portion from the semiconductor chip.

Abstract: A PDP driving method that is adaptive for a high-speed driving. In the method, an upper driving signal is applied to supply a data to address electrode lines provided at an upper block. A lower driving signal is applied to supply a data to address electrode lines provided at a lower block in such a manner to overlap with the upper driving signal.

Abstract: A flicker-eliminating method and apparatus for a plasma display panel that is capable of eliminating a flicker phenomenon caused by a different maximum light-emission time. In the method and apparatus, at least two modes in which at least one of said brightness weighting value and the number of said sub-fields are different from each other are established. The sub-field given by the maximum brightness weighting value is arranged at an initial part of the frame in each of said modes.

Abstract: A PDP driving method that is adaptive for a high-speed driving. In the method, an upper driving signal is applied to supply a data to address electrode lines provided at an upper block. A lower driving signal is applied to supply a data to address electrode lines provided at a lower block in such a manner to overlap with the upper driving signal.