Abstract: Disclosed are a source driver and a method of detecting crack of a display panel. A source driver may comprise a first circuit configured to apply first data to data lines connected to sub-pixels of a display panel to charge a first driving voltage; and a second circuit formed on the display panel that applies the first driving voltage to a detection line formed on the display panel to detect the presence of cracks in the display panel based on the illumination status of the sub-pixels, wherein the detection line includes a first detection node and a second detection node formed on one side of the display panel along its extension direction, wherein the first detection node is connected to data lines of the first and third sub-pixels, and wherein the second detection node is connected to data line of the second sub-pixel.

Abstract: A method of operating a memory device includes reading a first page of memory cells containing at least one worn-out memory cell therein using a read voltage, from a first memory block, and reading a second page of memory cells, which extends adjacent to the first page in the first memory block, using the read voltage. An operation is performed to determine a match rate between a position of a column including a “0” bit in the first page with a position of a column including a “0” bit in the second page. Thereafter, the second page is read by adjusting a read pass voltage applied to a word line of another page in the first memory block, when the match rate exceeds a threshold match rate.

Abstract: A multi-channel voltage sensing circuit for pixel compensation includes a plurality of channel circuits arranged for multiple channels; and a first dummy channel circuit and a second dummy channel circuit disposed among the plurality of channel circuits with some channel circuits interposed therebetween, wherein the first dummy channel circuit and the second dummy channel circuit receive a first reference voltage of a fixed level, and provide electrical coupling to adjacent channel circuits.

Abstract: A display driving apparatus includes an internal reference voltage generation circuit configured to generate and provide an internal reference voltage; a sensing circuit configured to simultaneously sense pixel signals provided from pixels of a display panel and the internal reference voltage, and output a reference voltage sensing signal generated by sensing of the internal reference voltage and pixel sensing signals generated by sensing of the pixel signals; and an output circuit configured to sequentially select the reference voltage sensing signal and the pixel sensing signals, convert the pixel sensing signals into pixel data, convert the reference voltage sensing signal into reference data, and transmits the pixel data and the reference data.

Abstract: The present embodiment relates to a technology for driving a display device, and provides a technology for adjusting the full-scale range (FSR) of an analog-to-digital converter according to a mode when sensing a pixel.

Abstract: A multi-channel voltage sensing circuit for pixel compensation includes a plurality of channel circuits arranged for multiple channels; and a first dummy channel circuit and a second dummy channel circuit disposed among the plurality of channel circuits with some channel circuits interposed therebetween, wherein the first dummy channel circuit and the second dummy channel circuit receive a first reference voltage of a fixed level, and provide electrical coupling to adjacent channel circuits.

Abstract: The present embodiment relates to a technology for driving a display device, and provides a technology for adjusting the full-scale range (FSR) of an analog-to-digital converter according to a mode when sensing a pixel.

Abstract: A display driving apparatus includes an internal reference voltage generation circuit configured to generate and provide an internal reference voltage; a sensing circuit configured to simultaneously sense pixel signals provided from pixels of a display panel and the internal reference voltage, and output a reference voltage sensing signal generated by sensing of the internal reference voltage and pixel sensing signals generated by sensing of the pixel signals; and an output circuit configured to sequentially select the reference voltage sensing signal and the pixel sensing signals, convert the pixel sensing signals into pixel data, convert the reference voltage sensing signal into reference data, and transmita the pixel data and the reference data.

Abstract: A source driver and a display device including the same, capable of accurately sensing pixels characteristics and characteristics of the source driver. A source driver includes a switch circuit configured to transfer first pixel signals or reference signals; first sensing channels configured to sense and hold the first pixel signals or the reference signals transferred from the switch circuit; second sensing channels configured to sense and hold second pixel signals; and a selection circuit configured to output a sampling signal by selecting the first pixel signals of the first sensing channels and the second pixel signals of the second sensing channels, and thereafter, output the sampling signal by selecting the reference signals of the first sensing channels.

Abstract: A source driver and a display device including the same, capable of accurately sensing pixels characteristics and characteristics of the source driver. A source driver includes a switch circuit configured to transfer first pixel signals or reference signals; first sensing channels configured to sense and hold the first pixel signals or the reference signals transferred from the switch circuit; second sensing channels configured to sense and hold second pixel signals; and a selection circuit configured to output a sampling signal by selecting the first pixel signals of the first sensing channels and the second pixel signals of the second sensing channels, and thereafter, output the sampling signal by selecting the reference signals of the first sensing channels.

Abstract: Disclosed herein is a digital-to-analog converter (DAC) including a clock driver for controlling a clock signal to provide an inverse delay clock signal to allow at least selective adjustment of a return to zero (RZ) section; and a DAC core comprising at least two DAC units for receiving a digital input value, the clock signal and the inverse delay clock signal and providing an analog output value. According to the present invention, distortion of the output of the DAC may be attenuated and loss of the output may be minimized by utilizing the RZ technique.

Abstract: Disclosed herein is a digital-to-analog converter (DAC) including a clock driver for controlling a clock signal to provide an inverse delay clock signal to allow at least selective adjustment of a return to zero (RZ) section; and a DAC core comprising at least two DAC units for receiving a digital input value, the clock signal and the inverse delay clock signal and providing an analog output value. According to the present invention, distortion of the output of the DAC may be attenuated and loss of the output may be minimized by utilizing the RZ technique.

Abstract: There is provided a power amplifier circuit capable of improving cross isolation between a high frequency band power coupler and a low frequency band power coupler, by directly transmitting power to the high frequency band power coupler and the low frequency band power coupler from a power amplifier, and forming a predetermined inductance circuit or an LC resonance circuit in a line transmitting the power to the high frequency band power coupler. The power amplifier circuit may include a power amplifying unit supplied with power from the outside and amplifying an input signal, a coupling unit having a high frequency band power coupler and a low frequency band power coupler, and an isolation unit including a first power line and a second power line, wherein the first power line has an inductor blocking signal interference generated in a predetermined frequency band.

Abstract: There is provided a power amplifier circuit capable of improving cross isolation between a high frequency band power coupler and a low frequency band power coupler, by directly transmitting power to the high frequency band power coupler and the low frequency band power coupler from a power amplifier, and forming a predetermined inductance circuit or an LC resonance circuit in a line transmitting the power to the high frequency band power coupler. The power amplifier circuit may include a power amplifying unit supplied with power from the outside and amplifying an input signal, a coupling unit having a high frequency band power coupler and a low frequency band power coupler, and an isolation unit including a first power line and a second power line, wherein the first power line has an inductor blocking signal interference generated in a predetermined frequency band.