Abstract: A memory device includes a memory cell array, a peripheral circuit, a test mode register set, and a test circuit. The peripheral circuit stores data in the memory cell array or reads data from the memory cell array. The test mode register set stores a delay value. In response to detecting a clock select signal received from outside the memory device, the test circuit generates an asynchronous signal from a clock received from the outside based on the delay value, and controls the peripheral circuit based on the asynchronous signal.

Abstract: A clock converter to output a clock signal for testing a semiconductor device includes: a clock input terminal to receive an input clock having an input frequency; a first frequency conversion circuit to receive the input clock and output a first conversion clock having a first frequency by increasing the input frequency using a fixed multiplier; a second frequency conversion circuit to receive the input clock and output a second conversion clock having a second frequency, greater than the first frequency, by increasing the input frequency using a variable multiplier; and a selection circuit to output the first conversion clock or the second conversion clock according to a mode selection signal.

Abstract: A memory device and a method are provided. The memory device includes a memory cell array; a peripheral circuit configured to store data in the memory cell array or to read data from the memory cell array; a test mode register set (TMRS) that stores a delay value; and a test circuit. In response to detecting a clock select signal received from outside the memory device, the test circuit generates an asynchronous signal from a clock received from the outside based on the delay value, and controls the peripheral circuit based on the asynchronous signal.