Patents by Inventor Seong Hyun Kim

Seong Hyun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8054972
    Abstract: An encryption processor, for storing encrypted data in a memory chip of a memory card, includes a FIFO memory for sequentially outputting m-bit data in response to a first signal, and an encryption key generator for generating m-bit encrypted keys (m being a positive integer) in response to a second signal and for sequentially outputting the keys in response to a third signal. A logic operator performs a logic operation on the data from the FIFO memory with the keys from the encryption key generator during a data write operation to sequentially encrypt the data. The logic operator performs a logic operation on the encrypted data received from a memory interface with the keys output from the encryption key generator during a data read operation in order to sequentially decode the encrypted data. The second signal is simultaneously generated with one of the write command or the read command.
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joong-Chul Yoon, Seong-Hyun Kim, Sung-hyun Kim, Sang-Bum Kim, Sang-Wook Kang, Chul-Joon Choi, Jong-Sang Choi, Koon-Han Sohn, Byung-Yoon Kang
  • Patent number: 8046502
    Abstract: The present invention provides an integrated circuit chip which includes a processor; a contact pad unit connected to a host through a plurality of contact pads; a host interface detector including at least one pull-up resistor and one pull-down resistor, for selectively connecting the pull-up resistor and the pull-down resistor to the contact pad unit to detect a host interface status; and an interface unit including a plurality of interface protocols, for communicating with the host using a part or all of the plurality of contact pads, wherein the processor receives a status of the host from the host interface detector, identifies a protocol of the host based on the received status of the host, and controls the interface unit so as to enable an interface protocol that is used to communicate with the host.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: October 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-Hyun Kim, Sang-Bum Kim, Joong-Chul Yoon, Sang-Wook Kang, Jong-Sang Choi, Sung-Hyun Kim, Chul-Joon Choi
  • Patent number: 8039295
    Abstract: An organic inverter and a method of manufacturing the same are provided, which regulates threshold voltages depending on positions when an inverter circuit is manufactured on a substrate using an organic semiconductor. To form a depletion load transistor and an enhancement driver transistor at adjacent positions of the same substrate, the surface of the substrate is selectively treated by positions or selectively applied by self-assembly monolayer treatment. Thus, a D-inverter having a combination of a depletion mode and an enhancement mode is more easily realized than a conventional method using a transistor size effect. Also, the D-inverter can be realized even with the same W/L ratio, thereby increasing integration density. That is, the W/L ratio does not need to be increased to manufacture a depletion load transistor, thereby improving integration density.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: October 18, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Kyung Soo Suh, Seong Hyun Kim
  • Publication number: 20110120866
    Abstract: Provided are an environmental gas sensor and a method of manufacturing the same. The environmental gas sensor includes an insulating substrate, metal electrodes formed on the insulating substrate, and a sensing layer in which different kinds of nanofibers are arranged perpendicular to each other on the metal electrodes. Thus, the environmental gas sensor can simultaneously sense two kinds of gases.
    Type: Application
    Filed: May 26, 2010
    Publication date: May 26, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Su Jae LEE, Jin Ah Park, Jae Hyun Moon, Seong Hyun Kim, Tae Hyoung Zyung, Hye Yong Chu
  • Publication number: 20110033971
    Abstract: An organic inverter and a method of manufacturing the same are provided, which regulates threshold voltages depending on positions when an inverter circuit is manufactured on a substrate using an organic semiconductor. To form a depletion load transistor and an enhancement driver transistor at adjacent positions of the same substrate, the surface of the substrate is selectively treated by positions or selectively applied by self-assembly monolayer treatment. Thus, a D-inverter having a combination of a depletion mode and an enhancement mode is more easily realized than a conventional method using a transistor size effect. Also, the D-inverter can be realized even with the same W/L ratio, thereby increasing integration density. That is, the W/L ratio does not need to be increased to manufacture a depletion load transistor, thereby improving integration density.
    Type: Application
    Filed: October 18, 2010
    Publication date: February 10, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Bon KOO, Kyung Soo SUH, Seong Hyun KIM
  • Patent number: 7884623
    Abstract: Provided is a detector having a transistor or resistor structure. When an electrode is exposed to a detected solution, such as blood, a variation in current flowing through the detected solution may be greater than a variation in the electrical characteristics of the detector caused by a variation in the physical properties of semiconductor so that it is difficult to detect whether a bio-particle is contained in the detected solution. In order to solve this problem, a detection portion and an electrical measurement portion are separately formed, and the detection portion is processed with the bio-particle and then post-processed. Subsequently, the detection portion and the electrical measurement portion are bonded to each other using, for example, a laminating process, and the detector measures a detection value.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: February 8, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Hyun Kim, Yong Suk Yang, Sang Chul Lim, Zin Sig Kim, Yoon Ho Song
  • Patent number: 7863085
    Abstract: An organic thin film transistor (OTFT), a method of manufacturing the same, and a biosensor using the OTFT are provided. The OTFT includes a gate electrode, a gate insulating layer, source and drain electrodes, and an organic semiconductor layer disposed on a substrate and further includes an interface layer formed between the gate insulating layer and the organic semiconductor layer by a sol-gel process. The gate insulating layer is formed of an organic polymer, and the interface layer is formed of an inorganic material. The OTFT employs the interface layer interposed between the gate insulating layer and the organic semiconductor layer so that the gate insulating layer can be protected from the exterior and adhesion of the gate insulating layer with the organic semiconductor layer can be improved, thereby increasing driving stability. Also, since the OTFT can use a plastic substrate, the manufacture of the OTFT is inexpensive so that the OTFT can be used as a disposable biosensor.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: January 4, 2011
    Assignee: Electronics and Telecommunication Research Institute
    Inventors: Sang Chul Lim, Seong Hyun Kim, Yong Suk Yang, Doo Hyeb Youn, Zin Sig Kim
  • Patent number: 7842952
    Abstract: An organic inverter and a method of manufacturing the same are provided, which regulates threshold voltages depending on positions when an inverter circuit is manufactured on a substrate using an organic semiconductor. To form a depletion load transistor and an enhancement driver transistor at adjacent positions of the same substrate, the surface of the substrate is selectively treated by positions or selectively applied by self-assembly monolayer treatment. Thus, a D-inverter having a combination of a depletion mode and an enhancement mode is more easily realized than a conventional method using a transistor size effect. Also, the D-inverter can be realized even with the same W/L ratio, thereby increasing integration density. That is, the W/L ratio does not need to be increased to manufacture a depletion load transistor, thereby improving integration density.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 30, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Kyung Soo Suh, Seong Hyun Kim
  • Publication number: 20100281187
    Abstract: An electronic device includes a universal serial bus (USB) interface therein. This USB interface is configured to support at least first and second different USB interface standards. These different interface standards are selected by the electronic device in response to comparing a voltage level of a signal provided to said USB interface relative to a reference voltage generated within the electronic device. The signal provided to the USB may be a power supply signal, the first USB standard may be a USB 2.0 interface standard and the second USB standard may be an inter-chip USB interface standard.
    Type: Application
    Filed: July 15, 2010
    Publication date: November 4, 2010
    Inventors: Sang-Bum Kim, Sang-Wook Kang, Seong-Hyun Kim, Chul-Joon Choi, Jong-Sang Choi
  • Patent number: 7805544
    Abstract: The present invention provides an integrated circuit chip which includes a processor; a contact pad unit connected to a host through a plurality of contact pads; a host interface detector including at least one pull-up resistor and one pull-down resistor, for selectively connecting the pull-up resistor and the pull-down resistor to the contact pad unit to detect a host interface status; and an interface unit including a plurality of interface protocols, for communicating with the host using a part or all of the plurality of contact pads, wherein the processor receives a status of the host from the host interface detector, identifies a protocol of the host based on the received status of the host, and controls the interface unit so as to enable an interface protocol that is used to communicate with the host.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: September 28, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-Hyun Kim, Sang-Bum Kim, Joong-Chul Yoon, Sang-Wook Kang, Jong-Sang Choi, Sung-Hyun Kim, Chul-Joon Choi
  • Publication number: 20100193824
    Abstract: Provided is a 2-terminal semiconductor device that uses an abrupt MIT semiconductor material layer. The 2-terminal semiconductor device includes a first electrode layer, an abrupt MIT semiconductor organic or inorganic material layer having an energy gap less than 2 eV and holes in a hole level disposed on the first electrode layer, and a second electrode layer disposed on the abrupt MIT semiconductor organic or inorganic material layer. An abrupt MIT is generated in the abrupt MIT semiconductor material layer by a field applied between the first electrode layer and the second electrode layer.
    Type: Application
    Filed: April 14, 2010
    Publication date: August 5, 2010
    Inventors: Hyun Tak KIM, Doo Hyeb Youn, Byung Gyu Chae, Kwang Yong Kang, Yong Sik Lim, Gyungock Kim, Sunglyul Maeng, Seong Hyun Kim
  • Patent number: 7768013
    Abstract: A vertical structure thin film transistor is provided. The vertical structure thin film transistor has a stacked structure of a substrate, a first electrode, a dielectric thin film, a second electrode, a semiconductor thin film, and a third electrode, wherein current flows between the second and third electrodes perpendicularly to the substrate and is modulated by an electric field generated from the first electrode parallel to the current.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: August 3, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Hyun Kim, Taehyoung Zyung
  • Patent number: 7769914
    Abstract: An electronic device includes a universal serial bus (USB) interface therein. This USB interface is configured to support at least first and second different USB interface standards. These different interface standards are selected by the electronic device in response to comparing a voltage level of a signal provided to said USB interface relative to a reference voltage generated within the electronic device. The signal provided to the USB may be a power supply signal, the first USB standard may be a USB 2.0 interface standard and the second USB standard may be an inter-chip USB interface standard.
    Type: Grant
    Filed: May 21, 2007
    Date of Patent: August 3, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Bum Kim, Sang-Wook Kang, Seong-Hyun Kim, Chul-Joon Choi, Jong-Sang Choi
  • Publication number: 20100159139
    Abstract: Provided is a method of forming a fine pattern of a polymer thin film using a phenomenon that another material having a large difference in surface energy in comparison with a polymer thin film pattern is dewetted on the polymer thin film pattern. Two polymer materials having a large difference in surface energy can be applied to readily and conveniently form a fine pattern of a polymer thin film of micrometer or sub-micrometer grade.
    Type: Application
    Filed: August 17, 2009
    Publication date: June 24, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seong Hyun Kim, Sang Chul Lim, Yong Suk Yang, Zin Sig Kim, Doo Hyeb Youn
  • Patent number: 7741635
    Abstract: Provided are a composition for an organic polymer gate insulating layer and an Organic Thin Film Transistor (OTFT) using the same. The composition includes an insulating organic polymer including at least one selected from the group consisting of polymethylmethacrylate (PMMA), polyvinylalcohol (PVA), polyvinylpyrrolidone (PVP), poly(vinyl phenol) (PVPh) and a copolymer thereof, a crosslinking monomer having two or more double bonds, and a photoinitiator. The OTFT includes a gate insulating layer of a semi-interpenetrating polymer network formed of the composition. The composition for a photoreactive organic polymer gate insulating layer has a photochemical characteristic that enables micropatterning, and can be formed into a layer having excellent chemical resistance, thermal resistance, surface characteristics and electrical characteristics.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: June 22, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seong Hyun Kim, Sang Chul Lim, Gi Heon Kim, Ji Ho Youk, Tae Gon Kim
  • Publication number: 20100135854
    Abstract: Provided are a biosensor and a method of fabricating the same. The biosensor has a transistor structure including a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, source and drain electrodes formed on the gate insulating layer, and a channel region formed between the source and drain electrodes. Here, the channel region includes an active layer formed of an active polymer sensing an antigen-antibody reaction and a hydrophilic nano particle. The active layer is formed through direct printing, for example, inkjet printing. The biosensor having such a structure can be increased in reactivity between an antigen and an antibody and hydrophilicity to improve the sensor's characteristics, fabricated in a large-area process using direct printing, and further facilitates formation of devices on various substrates formed of, for example, plastic.
    Type: Application
    Filed: August 5, 2009
    Publication date: June 3, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Suk YANG, Seong Hyun Kim, Sang Chul Kim, Doo Hyeb Youn, Zin Sig Kim
  • Patent number: 7728327
    Abstract: Provided is a 2-terminal semiconductor device that uses an abrupt MIT semiconductor material layer. The 2-terminal semiconductor device includes a first electrode layer, an abrupt MIT semiconductor organic or inorganic material layer having an energy gap less than 2eV and holes in a hole level disposed on the first electrode layer, and a second electrode layer disposed on the abrupt MIT semiconductor organic or inorganic material layer. An abrupt MIT is generated in the abrupt MIT semiconductor material layer by a field applied between the first electrode layer and the second electrode layer.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: June 1, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyun Tak Kim, Doo Hyeb Youn, Byung Gyu Chae, Kwang Yong Kang, Yong Sik Lim, Gyungock Kim, Sunglyul Maeng, Seong Hyun Kim
  • Publication number: 20100128139
    Abstract: An image editing method and an image editing apparatus include dividing an entire image, generating representative images, and generating edited images. Accordingly, a user may edit photographed images, recorded images or reproduced images more easily and conveniently.
    Type: Application
    Filed: July 22, 2009
    Publication date: May 27, 2010
    Applicant: Samsung Electronics Co., Ltd
    Inventors: In-ho KIM, Seong-hyun Kim
  • Patent number: 7711865
    Abstract: A movable storage device combined with a smart card can include a plurality of signal pins that are connected to at least one of a plurality of memory card hosts that use different communications protocols from each other or a smart card host, and at least one signal pin that is used as a mode distinguishing pin. A mode deciding unit can decide on an operation mode, which can be a smart card mode and/or a memory card mode based on a level of a first initial input signal received from the mode distinguishing pin. A smart card module can communicate with a smart card host in a smart card mode and a memory card module can be interfaced with memory card hosts, and communicates with a memory card host connected in a memory card mode and stores data.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-hyeon Kim, Tae-keun Jeon, Seong-hyun Kim
  • Patent number: 7687807
    Abstract: Provided are a structure and fabricating method of a new inverter for controlling a threshold voltage of each location when an inverter circuit is manufactured using an organic semiconductor on a plastic substrate. In general, p-type organic semiconductor is stable. Accordingly, when the inverter is formed of only the p-type semiconductor, a D-inverter composed of a depletion load and an enhancement driver has large gains, wide swing width and low power consumption, which is more preferable than an E-inverter composed of an enhancement load and an enhancement driver. However, it is impossible to form a depletion transistor and an enhancement transistor on the same substrate while controlling them by locations.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: March 30, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Bon Koo, Seong Hyun Kim, Kyung Soo Suh, Chan Hoe Ku, Sang Chul Lim, Jung Hun Lee