Patents by Inventor Seong Ju Park
Seong Ju Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7755098Abstract: Provided is a zinc oxide light emitting diode having improved optical characteristics. The zinc oxide light emitting diode includes an n-type semiconductor layer, a zinc oxide active layer formed on the n-type semiconductor layer, a p-type semiconductor layer formed on the active layer, an anode in electrical contact with the p-type semiconductor layer, a cathode in electrical contact with the n-type semiconductor layer, and a surface plasmon layer disposed between the n-type semiconductor layer and the active layer or between the active layer and the p-type semiconductor layer. Since the surface plasmon layer is formed between the n-type semiconductor layer and the active layer or between the active layer and the p-type semiconductor layer, the light emitting diode is not affected by an increase in resistance due to reduction of the thickness of the p-type semiconductor layer, and has improved optical characteristics due to a resonance phenomenon between the surface plasmon layer and the active layer.Type: GrantFiled: April 7, 2009Date of Patent: July 13, 2010Assignee: Gwangju Institute of Science and TechnologyInventors: Seong-Ju Park, Dae-Kue Hwang, Min-Ki Kwon, Min-Suk Oh, Yong-Seok Choi
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Publication number: 20100019223Abstract: There is provided a nitride semiconductor light emitting device including an active layer of a multi quantum well structure, the nitride semiconductor light emitting device including: a substrate; and a buffer layer, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer sequentially stacked on the substrate, wherein the active layer is formed of a multi quantum well structure where a plurality of barrier layers and a plurality of well layers are arranged alternately with each other, and at least one of the plurality of barrier layers includes a first barrier layer including a p-doped barrier layer doped with a p-dopant and an undoped barrier layer.Type: ApplicationFiled: December 18, 2008Publication date: January 28, 2010Applicants: SAMSUNG ELECTRO-MECHANICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Sang Won Kang, Seong Ju Park, Min Ki Kwon, Sang Jun Lee, Joo Young Cho, Yong Chun Kim, Sang Heon Han, Dong Ju Lee, Jeong Tak Oh, Je Won Kim
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Publication number: 20100019258Abstract: There is provided a semiconductor light emitting device that can easily dissipate heat, improve current spreading efficiency, and reduce defects by blocking dislocations occurring when a semiconductor layer is grown to thereby increase reliability. A semiconductor light emitting device including a substrate, a light emitting structure having an n-type semiconductor layer, an active layer, and a p-type semiconductor layer sequentially laminated, and an n-type electrode and a p-type electrode formed on the n-type semiconductor layer and the p-type semiconductor layer, respectively, according to an aspect of the invention may include: a metal layer formed in the n-type semiconductor layer and contacting the n-type electrode.Type: ApplicationFiled: December 18, 2008Publication date: January 28, 2010Applicants: SAMSUNG ELECTRO-MECHANICS CO., LTD., GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Sang Won KANG, Seong Ju Park, Joo Young Cho, Il Kyu Park, Yong Chun Kim, Dong Joon Kim, Jeong Tak Oh, Je Won Kim
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Publication number: 20090256148Abstract: Provided is a zinc oxide light emitting diode having improved optical characteristics. The zinc oxide light emitting diode includes an n-type semiconductor layer, a zinc oxide active layer formed on the n-type semiconductor layer, a p-type semiconductor layer formed on the active layer, an anode in electrical contact with the p-type semiconductor layer, a cathode in electrical contact with the n-type semiconductor layer, and a surface plasmon layer disposed between the n-type semiconductor layer and the active layer or between the active layer and the p-type semiconductor layer. Since the surface plasmon layer is formed between the n-type semiconductor layer and the active layer or between the active layer and the p-type semiconductor layer, the light emitting diode is not affected by an increase in resistance due to reduction of the thickness of the p-type semiconductor layer, and has improved optical characteristics due to a resonance phenomenon between the surface plasmon layer and the active layer.Type: ApplicationFiled: April 7, 2009Publication date: October 15, 2009Applicant: Gwangju Institute of Science and TechnologyInventors: Seong-Ju PARK, Dae-Kue HWANG, Min-Ki KWON, Min-Suk OH, Yong-Seok CHOI
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Patent number: 7575944Abstract: Provided is a method of manufacturing a nitride-based semiconductor LED including sequentially forming an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on a substrate; forming a Pd/Zn alloy layer on the p-type nitride semiconductor layer; heat-treating the p-type nitride semiconductor layer on which the Pd/Zn alloy layer is formed; removing the Pd/Zn alloy layer formed on the p-type nitride semiconductor layer; mesa-etching portions of the p-type nitride semiconductor layer, the active layer, and the n-type nitride semiconductor layer such that a portion of the upper surface of the n-type nitride semiconductor layer is exposed; and forming an n-electrode and a p-electrode on the exposed n-type nitride semiconductor layer and the p-type nitride semiconductor layer, respectively.Type: GrantFiled: August 13, 2007Date of Patent: August 18, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Sun Woon Kim, Seong Ju Park, Ja Yeon Kim, Min Ki Kwon, Dong Ju Lee, Jae Ho Han
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Publication number: 20090184334Abstract: There is provided a photonic crystal light emitting device including: a light emitting structure including first and second conductivity type semiconductor layers and an active layer interposed therebetween; a transparent electrode layer formed on the second conductivity type semiconductor layer, the transparent electrode layer having a plurality of holes arranged with a predetermined size and period so as to form a photonic band gap for light emitted from the active layer, whereby the transparent electrode layer includes a photonic crystal structure; and first and second electrode electrically connected to the first conductivity type semiconductor layer and the transparent electrode layer, respectively. The photonic crystal light emitting device has a transparent electrode layer formed of a photonic crystal structure defined by minute holes, thereby improved in light extraction efficiency.Type: ApplicationFiled: July 30, 2008Publication date: July 23, 2009Inventors: Dong Yul Lee, Seong Ju Park, Min Ki Kwon, Ja Yeon Kim, Yong Chun Kim, Bang Won Oh, Seok Min Hwang, Je Won Kim
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Publication number: 20090032800Abstract: There is provided a photonic crystal light emitting device including: a substrate; a plurality of nano rod light emitting structures formed on the substrate to be spaced apart from one another, each of the nano rod light emitting structures including a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer; and first and second electrodes electrically connected to the first and second conductivity type semiconductor layers, respectively, wherein the nano rod light emitting structures are arranged with a predetermined size and period so as to form a photonic band gap for light emitted from the active layer, whereby the nano rod light emitting structures define a photonic crystal structure. In the photonic crystal light emitting device, the nano rod light emitting structures are arranged to define a photonic crystal to enhance light extraction efficiency.Type: ApplicationFiled: July 30, 2008Publication date: February 5, 2009Inventors: Dong Yul Lee, Seong Ju Park, Min Ki Kwon, Ja Yeon Kim, Dong Joon Kim, Yong Chun Kim, Je Won Kim
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Publication number: 20090001363Abstract: There are provided a method of manufacturing a zinc oxide semiconductor, and a zinc oxide semiconductor manufactured using the method. A metal catalyst layer is formed on a zinc oxide thin film that has an electrical characteristic of a n-type semiconductor, and a heat treatment is performed thereon so that the zinc oxide thin film is modified into a zinc oxide thin film having an electrical characteristic of a p-type semiconductor. Hydrogen atoms existing in the zinc oxide thin film are removed by a metal catalyst during the heat treatment. Accordingly, the hydrogen atoms existing in the zinc oxide thin film are removed by the metal catalyst and the heat treatment, and the concentration of holes serving as carriers is increased. That is, an n-type zinc oxide thin film is modified into a highly-concentrated p-type zinc oxide semiconductor.Type: ApplicationFiled: June 24, 2008Publication date: January 1, 2009Applicant: Gwangju Institute of Science and TechnologyInventors: Seong Ju Park, Min Suk Oh, Dae Kyu Hwang, Min Ki Kwon
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Publication number: 20080293177Abstract: Provided is a method of manufacturing a nitride-based semiconductor LED including sequentially forming an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on a substrate; forming a Pd/Zn alloy layer on the p-type nitride semiconductor layer; heat-treating the p-type nitride semiconductor layer on which the Pd/Zn alloy layer is formed; removing the Pd/Zn alloy layer formed on the p-type nitride semiconductor layer; mesa-etching portions of the p-type nitride semiconductor layer, the active layer, and the n-type nitride semiconductor layer such that a portion of the upper surface of the n-type nitride semiconductor layer is exposed; and forming an n-electrode and a p-electrode on the exposed n-type nitride semiconductor layer and the p-type nitride semiconductor layer, respectively.Type: ApplicationFiled: August 13, 2007Publication date: November 27, 2008Inventors: Sun Woon Kim, Seong Ju Park, Ja Yeon Kim, Min Ki Kwon, Dong Ju Lee, Jae Ho Han
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Publication number: 20070127533Abstract: Disclosed herein is a vertical cavity surface emitting laser device. The laser device comprises a semiconductor lower mirror layer, a first semiconductor electrode layer, a gain-activation layer and a semiconductor anode layer sequentially grown on the compound semiconductor substrate, a re-growth pattern formed on the semiconductor anode layer to a width of 10˜100 ?m and an etching depth equal to or less than the semiconductor anode layer by etching, a first anode semiconductor buffer layer grown at a low temperature on the pattern, a second anode semiconductor layer grown at the low temperature for formation of an oxide layer, an anode semiconductor layer for tunnel junction, a cathode semiconductor layer for tunnel junction, a second semiconductor electrode layer for injection of electrons, and an upper mirror layer formed on the second semiconductor electrode layer. With this structure, the laser device comprises an effective electric current confining structure.Type: ApplicationFiled: December 29, 2005Publication date: June 7, 2007Inventors: Byueng Su Yoo, Jay Roh, Seong Ju Park, Ki Hwang Lee
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Patent number: 6852623Abstract: Disclosed herein is a method for manufacturing a zinc oxide semiconductor. The method comprises the steps of forming a zinc oxide thin film including a group V element as a dopant on a substrate by using a zinc oxide compound containing a group V element or an oxide thereof, charging the substrate having the zinc oxide thin film formed thereon into a chamber for thermal annealing, and thermal annealing the substrate in the chamber to activate the dopant, thereby changing the zinc oxide thin film exhibiting n-type electrical properties or insulator properties to a zinc oxide thin film exhibiting p-type electrical properties.Type: GrantFiled: November 6, 2003Date of Patent: February 8, 2005Assignee: Kwangju Institute of Science and TechnologyInventors: Seong-Ju Park, Kyoung-Kook Kim
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Publication number: 20040175860Abstract: Disclosed herein is a method for manufacturing a zinc oxide semiconductor. The method comprises the steps of forming a zinc oxide thin film including a group V element as a dopant on a substrate by using a zinc oxide compound containing a group V element or an oxide thereof, charging the substrate having the zinc oxide thin film formed thereon into a chamber for thermal annealing, and thermal annealing the substrate in the chamber to activate the dopant, thereby changing the zinc oxide thin film exhibiting n-type electrical properties or insulator properties to a zinc oxide thin film exhibiting p-type electrical properties.Type: ApplicationFiled: November 6, 2003Publication date: September 9, 2004Applicant: KWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Seong-Ju Park, Kyoung-Kook Kim
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Patent number: 6773946Abstract: Disclosed is a nanosized III-nitride compound semiconductor multiple quantum well light-emitting diode, comprising a silicon substrate (100), and an amorphous silicon nitride layer (base) (200) formed on the substrate and including III-nitride compound semiconductor nano grains (230) spontaneously formed therein. The nanosized nitride semiconductor multiple quantum well light-emitting diode and the fabrication method thereof according to the present invention are free from the problems of the conventional III-nitride compound semiconductor epitaxial thin film growth on silicon substrates. Accordingly, a high-quality nanosized III-nitride compound semiconductor multiple quantum well light-emitting diode having no crystalline defect can be provided.Type: GrantFiled: December 30, 2002Date of Patent: August 10, 2004Assignee: Kwagju Institute of Science and TechnologyInventors: Yong Tae Moon, Nae Man Park, Baek Hyun Kim, Seong Ju Park
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Publication number: 20040094756Abstract: Disclosed is a III-nitride compound semiconductor nanophase opto-electronic cell, comprising a silicon substrate (100), and an amorphous silicon nitride layer (base) (200) formed on the substrate and including III-nitride compound semiconductor nano grains (230) spontaneously formed therein. The nitride semiconductor nanophase opto-electronic cell and the fabrication method thereof according to the present invention are free from the problems of the conventional III-nitride compound semiconductor thin film growth on silicon substrates. Accordingly, a high-quality III-nitride compound semiconductor nanophase opto-electronic cell having no crystalline defect can be provided. Furthermore, the opto-electronic cell according to the present invention does not require a p-type GaN thin film so that there is no possibility of causing crack that is a problem in the conventional method of fabricating a III-nitride compound semiconductor opto-electronic cell using III-nitride thin films grown on silicon substrates.Type: ApplicationFiled: December 30, 2002Publication date: May 20, 2004Inventors: Yong Tae Moon, Nae Man Park, Baek Hyun Kim, Seong Ju Park
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Patent number: 6544870Abstract: The present invention relates to a light-emitting device utilizing amorphous silicon quantum dot nanostructures, wherein the light-emitting device can be fabricated using the existing silicon semiconductor fabrication technology, is excellent in light-emitting efficiency, and can emit light in the visible region including short wavelength region such as green and blue.Type: GrantFiled: April 18, 2001Date of Patent: April 8, 2003Assignee: Kwangju Institute of Science and TechnologyInventors: Nae Man Park, Tae Soo Kim, Seong Ju Park
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Publication number: 20020153522Abstract: The present invention relates to a light-emitting device utilizing amorphous silicon quantum dot nanostructures, wherein the light-emitting device can be fabricated using the existing silicon semiconductor fabrication technology, is excellent in light-emitting efficiency, and can emit light in the visible region including short wavelength region such as green and blue.Type: ApplicationFiled: April 18, 2001Publication date: October 24, 2002Applicant: Kwangju Institute of Science and TechnologyInventors: Nae Man Park, Tae Soo Kim, Seong Ju Park
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Patent number: 6326294Abstract: A method of fabricating on ohmic metal electrode. The p-type ohmic metal electrode according to the present invention employs Ru and RuOx as the cover layer in lieu of conventional Au, in order to effectively prevent penetration by contaminants in the air, such as oxygen, carbon, and H2O, and to form a stable metal-Ga intermetallic phase at the junction between the contact layer and the nitride compound semiconductor. The n-type ohmic metal electrode according to the present invention employs Ru as the diffusion barrier in lieu of conventional Ni or Pt, in order to effectively form a metal-nitride phase such as titanium nitride that contributes to superior ohmic characteristics during the heating process, without destruction of the junction. According to the present invention, it is possible to fabricate devices having superior electrical, optical, and thermal characteristics compared with conventional devices.Type: GrantFiled: April 24, 2001Date of Patent: December 4, 2001Assignee: Kwangju Institute of Science and TechnologyInventors: Ja Soon Jang, Tae Yeon Seong, Seong Ju Park
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Patent number: 6303404Abstract: Disclosed is a method for fabricating a white LED which comprises, as a single active layer, an InGaN thin film which enables emission of white light. The InGaN thin film is constructed by taking advantage of the spinodal decomposition of the ternary compound and rapid thermal annealing. When growing the InGaN thin film on an n-type GaN formed on a sappier substrate under a growth condition, the thin film undergoes spinodal decomposition into two phases which show photoluminescence of a wavelength range from violet to blue and from green to blue, respectively, after which the surface of the thin film is thermally stabilized by rapid thermal annealing and the photoluminescence of the In-deficient phase is improved, so as to give intensive white photoluminescence to the InGaN single active layer. The LED which recruits such a single active InGaN thin film is superb in light emission efficiency and can be fabricated in a significantly reduced process steps.Type: GrantFiled: May 28, 1999Date of Patent: October 16, 2001Inventors: Yong Tae Moon, Dong Joon Kim, Keun Man Song, Seong Ju Park
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Patent number: 6294016Abstract: Disclosed is a method for manufacturing a high conductivity p-type GaN-based thin film superior in electrical and optical properties by use of nitridation and RTA (rapid thermal annealing) in combination. A GaN-based epitaxial layer is grown to a desired thickness while being doped with Mg dopant with a carrier gas of hydrogen by use of a MOCVD process. The film thus obtained is subjected to nitridation using nitrogen plasma and RTA in combination. The p-type GaN-based thin film exhibits high hole concentration as well as low resistivity, so that it can be used where high electrical, optical, thermal and structural properties are needed. The method finds application in the fabrication of blue/white LEDs, laser diodes and other electronic devices.Type: GrantFiled: October 20, 1999Date of Patent: September 25, 2001Assignee: Kwangju Institute of Science and TechnologyInventors: Sang Woo Kim, Ji Myon Lee, Kwang Soon Ahn, Rae Man Park, Ja Soon Jang, Seong Ju Park
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Patent number: 6169297Abstract: A metal thin film with an ohmic contact for light emit diodes and a method of producing such a film are disclosed. The metal thin film has a p-type gallium nitride (GaN) semiconductor layer. Nickel (Ni), platinum (Pt) and gold (Au) layers are deposited on the GaN semiconductor layer in a way such that the gold layer forms a top layer, with either one of the platinum and nickel layers being selectively used as an inter-diffusion barrier between metal layers. The inter-diffusion barrier may be formed by depositing platinum between the nickel and gold layers, thus forming an Ni/Pt/Au metal thin film, or formed by depositing nickel between the platinum and gold layers, thus forming an Pt/Ni/Au metal thin film. In the method, a GaN semiconductor is washed so as to be free from carbide and oxide layers. The Ni, Pt and Au layers are formed on the GaN semiconductor layer through a vacuum deposition process at 5×10−5-2×10−1 torr.Type: GrantFiled: December 17, 1998Date of Patent: January 2, 2001Assignee: Kwangju Institute of Science and TechnologyInventors: Ja Soon Jang, Hyo Keun Kim, Seong Ju Park, Tae Yeon Seong, Heung Kyu Jang