Patents by Inventor Seong-Kweon Ha

Seong-Kweon Ha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9412716
    Abstract: A method of manufacturing a semiconductor package includes: forming a strip substrate including a plurality of unit substrates, each being provided with a first connection pad and a second connection pad on a first surface of the unit substrate and each unit substrate being electrically and physically isolated from each other with the intervention of saw lines, first ground connection pads formed on the respective unit substrates, each of the first ground connection pads being electrically coupled with the first connection pad over the respective unit substrates, second ground connection pads formed on the saw line on the first surface side of the unit substrates and electrically isolated from the unit substrates, and test wiring formed on the saw line, the test wiring being electrically isolated from the unit substrates and electrically coupled with the second ground connection pads; and attaching semiconductor chips onto the respective unit substrates.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: August 9, 2016
    Assignee: SK hynix Inc.
    Inventors: Jin Ho Bae, Qwan Ho Chung, Seong Kweon Ha, Jong Hyun Kim, Bok Gyu Min, Jae Won Shin
  • Publication number: 20150123283
    Abstract: A method of manufacturing a semiconductor package includes: forming a strip substrate including a plurality of unit substrates, each being provided with a first connection pad and a second connection pad on a first surface of the unit substrate and each unit substrate being electrically and physically isolated from each other with the intervention of saw lines, first ground connection pads formed on the respective unit substrates, each of the first ground connection pads being electrically coupled with the first connection pad over the respective unit substrates, second ground connection pads formed on the saw line on the first surface side of the unit substrates and electrically isolated from the unit substrates, and test wiring formed on the saw line, the test wiring being electrically isolated from the unit substrates and electrically coupled with the second ground connection pads; and attaching semiconductor chips onto the respective unit substrates.
    Type: Application
    Filed: May 22, 2014
    Publication date: May 7, 2015
    Applicant: SK hynix Inc.
    Inventors: Jin Ho BAE, Qwan Ho CHUNG, Seong Kweon HA, Jong Hyun KIM, Bok Gyu MIN, Jae Won SHIN
  • Patent number: 6841872
    Abstract: A semiconductor package and a fabrication method thereof can enhance adhesion between a solder and a package body by employing an irregular metal pattern, and improve stability. The semiconductor package includes a semiconductor substrate; a plurality of chip pads separately formed on an upper surface of the semiconductor substrate; an irregular metal pattern electrically connected to the plurality of chip pads; and an external terminal electrically connected to the metal pattern. In addition, a method of fabricating the semiconductor package includes the steps of separately forming a plurality of chip pads on an upper surface of a semiconductor substrate; forming an irregular metal pattern electrically connected to the plurality of chip pads; and forming an external terminal electrically connected to the metal of chip pads; and forming an external terminal electrically connected to the metal pattern.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: January 11, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Seong-Kweon Ha, Jong-Hun Kim