Abstract: An array substrate includes a transistor, a pixel electrode and an upper insulation layer. The transistor is formed on an upper insulation layer formed on a base substrate. The pixel electrode is electrically connected to the transistor. The upper insulation layer covers the transistor to directly make contact with the base substrate of an area having the pixel electrode formed thereon.

Abstract: An array substrate includes a thin-film transistor (TFT), a first insulation layer and a second insulation layer. The TFT is formed on the substrate. The TFT includes an active pattern, a gate metal pattern and a data metal pattern. The first insulation layer insulates the active pattern from the gate metal pattern. The second insulation layer is formed spaced apart by a predetermined width from at least one edge of the substrate. The second insulation layer insulates the gate metal pattern from the data metal pattern. Therefore, the second insulation layer is formed so that stress that is inflicted on a substrate may be decreased, thereby preventing deformation during a manufacturing process of the substrate.

Abstract: A thin film transistor including an insulating plate, a thin film transistor formed on the insulating plate, a first insulating layer formed on the insulating plate having the thin film transistor, a reflecting electrode formed on at least a portion of the first insulating layer, and a transparent electrode formed on at least a portion of the first insulating layer and on at least a portion of the reflecting electrode is disclosed. Up to about 85% of a total area of the transparent electrode overlaps with the reflecting electrode. About 10% to about 85% of the total area of the transparent electrode may overlap with the reflecting electrode. About 10% to about 20% of the total area of the transparent electrode may overlap with the reflecting electrode. About 40% to about 50% of the total area of the transparent electrode may overlap with the reflecting electrode. About 75% to about 85% of the total area of the transparent electrode may overlap with the reflecting electrode.

Abstract: A thin-film transistor substrate includes a gate line, a capacitor dielectric layer, a gate insulation layer, an active pattern, a data line, a protection layer, and a pixel electrode. The gate wiring including a gate electrode, a lower storage electrode, and a gate metal pad is disposed on a substrate. The capacitor dielectric layer is disposed on the lower storage electrode and the gate insulation layer is disposed on the substrate. The active pattern includes an active layer and a dummy active layer disposed on the gate insulation layer in a gate electrode region and a gate metal pad region, respectively. A portion of the upper storage electrode is disposed on the capacitor dielectric layer exposed through a first contact hole in the gate insulation layer.

Abstract: According to a method of manufacturing a thin-film transistor (TFT) substrate, a gate insulation layer, a semiconductor layer, an ohmic contact layer, and a data metal layer are sequentially formed on a substrate. A photoresist pattern is formed in a source electrode area and a drain electrode area. A data metal layer is etched using the photoresist pattern as an etch-stop layer to form a data wire including a source electrode and a drain electrode. A photoresist pattern is reflowed to cover a channel region between a source electrode and the drain electrode. An ohmic contact layer and the semiconductor layer are etched using the reflowed photoresist pattern as an etch-stop layer to form an active pattern including an ohmic contact pattern and a semiconductor pattern. The reflowed photoresist pattern is etched back to expose a portion of the ohmic contact pattern in the channel region. The ohmic contact pattern is etched using the etched-back photoresist pattern as an etch-stop layer.

Abstract: A thin film transistor array panel includes interconnection members interposed between the underlying gate pads made of an Al-containing metal and the overlying contact assistants made of a transparent conductor such as ITO thereon to prevent corrosion of Al due to ITO, or gate-layer signal transmission lines. Gate-layer signal transmission lines are directly connected to the data-layer signal transmission line to prevent corrosion of Al due to ITO in the thin film transistor array panel according to an embodiment of the present invention. The color filters are formed on the thin film transistor array panel to prevent misalignment between the two display panels so as to increase the aperture ratio.

Abstract: In a metal wiring, a method of forming the metal wiring, a display substrate having the metal wiring and a method of manufacturing the display substrate, the metal wiring includes a metal film and a first amorphous carbon film. The metal film is formed on a base substrate using a copper-containing material, and the first amorphous carbon film is formed beneath the metal film. A process for forming the metal wiring including the amorphous carbon film may be greatly simplified, and generation of defects in the metal wiring may be prevented or reduced.

Abstract: System and techniques for providing signal lines comprising copper alloys including at least one of molybdenum, tungsten, and chromium. The present disclosure provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a semiconductor layer formed on the gate insulating layer; ohmic contacts formed on the gate insulating layer and the semiconductor layer; a data line having a source electrode formed on one of the ohmic contacts and having a narrower width than the ohmic contact thereunder; a drain electrode facing the source electrode with a gap therebetween and having a narrower width than the ohmic contact thereunder; and a pixel electrode connected to the drain electrode, wherein at least one of the gate line and the data line comprises a Cu-alloy that contains Cu and one selected from molybdenum (Mo), tungsten (W), and chromium (Cr).