Patents by Inventor Seong-Min Wi

Seong-Min Wi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit devices having improved internal voltage generators which reduce timing skew in buffer circuits therein
    Patent number: 6100744
    Abstract: Integrated buffer circuits include an output driver powered at a first power supply voltage (EVC) and a voltage boosting circuit which drives an input (DOK) of the output driver and is powered at a second power supply voltage (VINTQ) having a magnitude less than a magnitude of the first power supply voltage. An internal power supply voltage generator is provided which generates the second power supply voltage at a level which varies inversely with increases in the first power supply voltage in order to minimize timing skew associated with the output driver. This is achieved by lowering the voltage of the signal applied to the input (DOK) of the output driver to compensate for the output driver being powered at an increased first power supply voltage.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: August 8, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sei-Seung Yoon, Seong-Min Wi