Patents by Inventor Seong Moon CHOI

Seong Moon CHOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250098218
    Abstract: A thin film transistor includes a first gate electrode on a substrate, a gate insulating film on the first gate electrode, a first active layer on the gate insulating film, a drain electrode on one side of the first active layer, a sidewall spacer on a side wall of the drain electrode, and a first source electrode provided on the other side of the first active layer and a sidewall of the sidewall spacer.
    Type: Application
    Filed: July 2, 2024
    Publication date: March 20, 2025
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae-Eun PI, Seung Youl KANG, Yong Hae KIM, Joo Yeon KIM, Hee-ok KIM, Jaehyun MOON, Jong-Heon YANG, Himchan OH, Seong-Mok CHO, Ji Hun CHOI, Chi-Sun HWANG
  • Patent number: 12227762
    Abstract: The present invention relates to a method for culturing neural stem cells into spheroids, the method including: culturing neural stem cells in a culture vessel coated with a protein containing a VGVPG pentapeptide and an RGD integrin receptor ligand; and isolating the neural stem cells that are aggregated and formed into spheroids during the culturing.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: February 18, 2025
    Assignee: DAEGU GYEONGBUK INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Cheil Moon, Won Bae Jeon, Sam Hwan Kim, Seong Kyoon Choi
  • Patent number: 12211630
    Abstract: Provided are stretchable electronics and a method for manufacturing the same. The stretchable electronics may include a substrate, a plurality of electronic elements disposed to be spaced apart from each other on the substrate, and a wire structure disposed on the substrate to connect the plurality of electronic elements to each other. The wire structure may include an insulator extending from one of the electronic elements to the other of the adjacent electronic elements and a metal wire configured to cover a top surface and side surfaces of the insulator. The insulator may include at least one bent part in a plan view.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: January 28, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Ji Hun Choi, Chan Woo Park, Ji-Young Oh, Seung Youl Kang, Yong Hae Kim, Hee-ok Kim, Jeho Na, Jaehyun Moon, Jong-Heon Yang, Himchan Oh, Seong-Mok Cho, Sung Haeng Cho, Jae-Eun Pi, Chi-Sun Hwang
  • Publication number: 20140220736
    Abstract: Disclosed herein are a power module package and a method for manufacturing the same. The power module package includes: first and second lead frames arranged to face each other, both or either of the first and second frames being made of aluminum; anodized layers formed on portions of the lead frame(s) made of aluminum in the first and second lead frames; and semiconductor devices mounted on first surfaces of the first and second lead frames.
    Type: Application
    Filed: April 3, 2014
    Publication date: August 7, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kwang Soo Kim, Ji Hyun Park, Young Ki Lee, Seong Moon Choi
  • Publication number: 20140103386
    Abstract: Provided is an LED package including a metal substrate that has one or more via holes formed therein; an insulating layer that is formed on a surface of the metal substrate including inner surfaces of the via holes; a plurality of metal patterns that are formed on the insulating layer and are electrically isolated from one another; and an LED chip that is mounted on a metal pattern among the plurality of metal patterns.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 17, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang Hyun SHIN, Seong Moon CHOI, Young Ki LEE