Abstract: A display device includes pixels including a light-emitting element, and an initialization transistor connected between an anode electrode of the light-emitting element and a first initialization power line to which a voltage of initialization power is supplied, and turned on when an initialization scan signal is supplied, and an initialization scan driver which supplies the initialization scan signal. The initial scan driver supplies an i-th (i is a natural number) initial scan signal to overlap an (i?1)-th initial scan signal, and supplies an (i+1)-th initial scan signal so as not to overlap the i-th initial scan signal, and the initialization scan signal is set to a gate-on voltage.

Abstract: A display device includes a display panel including a pixel coupled to first to fourth scan lines, an emission control line, and a data line, a scan driver which supplies a first scan signal to the first scan line, a second scan signal to the second scan line, a third scan signal to the third scan line, and a fourth scan signal to the fourth scan line, an emission driver which supplies an emission control signal to the emission control line, a data driver which supplies a data signal to the data line, and a timing controller which controls the scan driver, the emission driver, and the data driver. Each of the second and third scan signals has a gate-on level during a partial period of one frame, and is maintained at a gate-off level during a remaining period of the one frame, other than the partial period.

Abstract: A display device includes a display panel including a pixel coupled to first to fourth scan lines, an emission control line, and a data line, a scan driver which supplies a first scan signal to the first scan line, a second scan signal to the second scan line, a third scan signal to the third scan line, and a fourth scan signal to the fourth scan line, an emission driver which supplies an emission control signal to the emission control line, a data driver which supplies a data signal to the data line, and a timing controller which controls the scan driver, the emission driver, and the data driver. Each of the second and third scan signals has a gate-on level during a partial period of one frame, and is maintained at a gate-off level during a remaining period of the one frame, other than the partial period.

Abstract: A display device includes: a pixel connected to a first scan line, a second scan line, and a data line, and including a light emitting element and a storage capacitor; and a timing controller configured to drive the pixel in a normal mode in which a driving frequency is maintained constant or a frequency variable mode according to a variable frequency signal supplied from outside, wherein in the normal mode, a first electrode voltage of the light emitting element is initialized in response to a data voltage being supplied to the storage capacitor, and wherein in the frequency variable mode, the first electrode voltage of the light emitting element is not initialized in response to the data voltage being supplied to the storage capacitor.