Abstract: A dual port video random access memory device operates as a dual port by adding a serial access memory portion to a dynamic random access memory portion. A block write function can be selectively performed by multiplexing either a decoded signal corresponding to the two least significant bits of a column address or a 4 bit data input. An improved memory device construction is taught which reduces the total number of transistors necessary to perform the dual port function of prior art memory devices. As a result, chip layout and chip miniaturization can be realized.