Patents by Inventor Seong Park

Seong Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072389
    Abstract: A battery module includes a battery cell stack that is formed by stacking a plurality of battery cells along a first direction, an insulating cover that covers both end parts of the battery cell stack, a holding member that wraps both end parts of the battery cell stack adjacent to the insulating cover, and a first electrode lead and a second electrode lead that protrude from each of a first battery cell and a second battery cell adjacent to each other included in the battery cell stack, the first electrode lead and the second electrode lead are bent in different directions from each other, and the first electrode lead and the second electrode lead overlap with each other, to form a welding part and an extra space between the welding part and the battery cell stack.
    Type: Application
    Filed: July 12, 2021
    Publication date: February 29, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Won Kyoung PARK, Junyeob SEONG, Subin PARK
  • Patent number: 11913935
    Abstract: The present invention relates to polypropylene non-woven fabric having excellent loft property, a method for preparing polypropylene non-woven fabric having excellent loft property, and a method for evaluating the properties of the polypropylene resin.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: February 27, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Hyunsup Lee, Seong Min Chae, Kyung Seop Noh, Heekwang Park, Ki Soo Lee, Sangjin Jeon, Myunghan Lee
  • Publication number: 20240049466
    Abstract: A memory device, and a method of manufacturing the same, includes a stacked structure including gate lines stacked to be spaced apart from each other. The memory device also includes a first channel structure vertical to the gate lines and including a major axis in a first direction. The memory device further includes a second channel structure configured to separate the first channel structure and including a major axis in a second direction orthogonal to the first direction. The first channel structure includes a first memory cell group and a second memory cell group separated from each other by the second channel structure. The second channel structure includes a third memory cell group and a fourth memory cell group separated from each other in the second direction.
    Type: Application
    Filed: February 6, 2023
    Publication date: February 8, 2024
    Applicant: SK hynix Inc.
    Inventors: Won Geun CHOI, Mi Seong PARK, In Su PARK, Jung Shik JANG, Jung Dal CHOI
  • Publication number: 20240046701
    Abstract: The present disclosure relates to a method of identifying a posture and detecting a specific behavior based on artificial intelligence. A method of detecting an abnormal behavior in a video based on a computational device according to an embodiment of the present disclosure may involve obtaining at least one video frame; obtaining at least one piece of human posture information from a first artificial intelligence based on the obtained video frame; obtaining information on whether an abnormal behavior has been detected and at least one piece of abnormal behavior information from a second artificial intelligence based on at least one piece of human posture information obtained in chronological order; and marking the at least one video frame based on the information on whether an abnormal behavior has been detected and the at least one piece of abnormal behavior information.
    Type: Application
    Filed: December 26, 2022
    Publication date: February 8, 2024
    Applicant: MARKANY INC.
    Inventors: Min Seong PARK, Chang Dae SON, Si Ye JANG, Ji In NAM
  • Publication number: 20240023332
    Abstract: A semiconductor memory device is provided. The semiconductor memory device includes a gate stacked structure including conductive layers, each of the conductive layers extending in a first direction and a second direction and including a top surface facing a third direction, wherein the conductive layers are stacked to be spaced apart from each other in the third direction. Also, the semiconductor memory device includes a first channel structure and a second channel structure extending in the third direction to pass through the gate stacked structure and spaced apart from each other in the second direction, a first insulating layer disposed over the gate stacked structure, an etch stop layer disposed over the first insulating layer and including a trench, an insulating material in the trench, and a bit line contact passing through the insulating material.
    Type: Application
    Filed: January 18, 2023
    Publication date: January 18, 2024
    Applicant: SK hynix Inc.
    Inventors: Won Geun CHOI, Mi Seong PARK, Jung Shik JANG
  • Publication number: 20240001383
    Abstract: Proposed is a laser treatment device having a cooling system, the device including a laser module which irradiates a patient's skin with a laser, a sensing unit which detects a temperature of a surface of the patient's skin before, during, or after the skin is heated by the laser, a cooling module which includes an inlet which receives a refrigerant from a refrigerant storage unit, a nozzle which sprays the refrigerant on the skin, a conduit which connects the inlet with the nozzle, an flow rate control unit which controls a spray amount of the refrigerant by using a valve which is positioned on the conduit and connects or disconnects the inlet with or from the nozzle, and a refrigerant condition control unit which applies a thermal energy to the refrigerant by using a thermoelectric element located between the flow rate control unit and the nozzle.
    Type: Application
    Filed: August 9, 2023
    Publication date: January 4, 2024
    Inventors: Kyungbae KIM, Daehyun KIM, Chulho LEE, Kyong Kwan RO, Boo Seong PARK
  • Publication number: 20230395495
    Abstract: There are provided a memory device and a manufacturing method of the memory device. The memory device includes: a stack structure including gate lines stacked to be spaced apart from each other; main plugs arranged to be spaced apart from each other; plug isolation patterns isolating the main plugs into first and second sub-plugs; and a select isolation pattern isolating at least one gate line located between the plug isolation patterns adjacent to each other.
    Type: Application
    Filed: January 11, 2023
    Publication date: December 7, 2023
    Applicant: SK hynix Inc.
    Inventors: Won Geun CHOI, Jeong Hwan KIM, Mi Seong PARK, Jung Shik JANG
  • Publication number: 20230395424
    Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.
    Type: Application
    Filed: August 15, 2023
    Publication date: December 7, 2023
    Applicant: SK hynix Inc.
    Inventors: Dong Hun LEE, Jeong Hwan KIM, Mi Seong PARK, Jung Shik JANG, Won Geun CHOI
  • Patent number: 11798498
    Abstract: A method of manufacturing a display device including a pixel which is connected to a scan line and a data line intersecting the scan line. The pixel includes a light emitting element and a driving transistor controlling a driving current, which is supplied to the light emitting element, according to a data voltage received from the data line. The driving transistor includes a first active layer having an oxide semiconductor containing tin (Sn).
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: October 24, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joon Seok Park, Jun Hyung Lim, Jin Seong Park, Jiazhen Sheng, Tae Hyun Hong
  • Publication number: 20230334341
    Abstract: A method for augmenting data according to some embodiments of the present disclosure includes obtaining a score prediction model learned using a first noisy sample of a first class, generating a second noisy sample by adding the noise with the specified distribution to a sample of a second class, and generating a fake sample of the first class from the second noisy sample using a score for the second noisy sample predicted through the score prediction model.
    Type: Application
    Filed: January 27, 2023
    Publication date: October 19, 2023
    Applicants: SAMSUNG SDS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Min Jung KIM, Se Won PARK, No Seong PARK, Ja Young KIM, Chae Jeong LEE, Yeh Jin SHIN, Chang Joon LEE, Ji Hoon CHOI
  • Publication number: 20230320094
    Abstract: A memory device, and a method of manufacturing the same, includes a stack structure and main plugs passing through the stack structure, the main plugs being spaced apart from each other in a first direction. The memory device also includes a separation pattern separating the main plugs in a second direction and a slit pattern separating the stack structure into first and second memory blocks, the slit pattern having an ellipse shape.
    Type: Application
    Filed: September 20, 2022
    Publication date: October 5, 2023
    Applicant: SK hynix Inc.
    Inventors: Won Geun CHOI, Mi Seong PARK, Jung Shik JANG
  • Publication number: 20230317855
    Abstract: A thin film transistor substrate and a display apparatus including the same includes a substrate; an active layer and a gate electrode on the substrate, the active layer and gate electrode being spaced apart from each other vertically; a gate insulating film including a first gate insulating film and a second gate insulating film provided between the active layer and the gate electrode; and a source electrode and a drain electrode, each of the source electrode and the drain electrode connected to the active layer. The first gate insulating film is provided closer to the gate electrode than the second gate insulating film, a dielectric constant of the first gate insulating film is higher than a dielectric constant of the second gate insulating film, and a hydrogen content of the first gate insulating film is lower than a hydrogen content of the second gate insulating film.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 5, 2023
    Applicants: LG Display Co., Ltd., Hanyang University Industry-University Cooperation Foundation
    Inventors: JungSeok SEO, Jin Seong PARK, Jaeyoon PARK, Ki Lim HAN, Taewon HWANG, Won-Bum LEE
  • Publication number: 20230305657
    Abstract: A sensor device including: first sensors; second sensors configured to form capacitances with the first sensors; a sensor transmitter connected to the first sensors and configured to supply driving signals having a first frequency to the first sensors; and a sensor receiver connected to the second sensors and configured to receive sensing signals from the second sensors, wherein the sensor receiver includes: a multipath filter having a center frequency set to the first frequency; and a first chopper integrator connected to the multipath filter, and having a center frequency set to the first frequency.
    Type: Application
    Filed: December 6, 2022
    Publication date: September 28, 2023
    Inventors: Keum Dong JUNG, Oh Jo Kwon, Ji Woong Kim, Hyung Gun Ma, Seong An Park, Sang Hyun Heo
  • Patent number: 11769689
    Abstract: A method of manufacturing a semiconductor device is provided. The method may include forming a stack, forming a preliminary stepped structure by patterning the stack, forming a first stepped structure, a second stepped structure, and an opening located between the first stepped structure and the second stepped structure by etching the preliminary stepped structure, forming a passivation layer that fills the opening and covers the first stepped structure, and forming a third stepped structure by etching the second stepped structure using the passivation layer as an etching barrier.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: September 26, 2023
    Assignee: SK hynix Inc.
    Inventors: Dong Hun Lee, Jeong Hwan Kim, Mi Seong Park, Jung Shik Jang, Won Geun Choi
  • Publication number: 20230296585
    Abstract: Pancreatic cancer organoids prepared by a method of the present invention sufficiently reflect the interaction between cancer cells and endothelial cells, that is, cross-talk with the vascular niche, and thus they can show the characteristics of cancer-initiating cells (CICs) present in the organism environment, compared to conventional cancer organoids. Accordingly, the clinical applicability and reliability of the screened drug may be further remarkably increased.
    Type: Application
    Filed: August 6, 2021
    Publication date: September 21, 2023
    Inventors: Jong Baeck Lim, Jae Il Choi, Joon Seong Park, Sung Ill Jang, Jae Hee Cho
  • Patent number: 11735103
    Abstract: An analog front-end includes a (1-1)-th charge amplifier configured to differentially amplify a first and second sensing signals provided to a (1-1)-th input terminal and a (1-2)-th input terminal, respectively, and output a (1-1)-th differential signal. A (1-2)-th charge amplifier is configured to differentially amplify the second sensing signal and a third sensing signal provided to a (1-3)-th input terminal and a (1-4)-th input terminal, respectively, and output a (1-2)-th differential signal. A second charge amplifier is configured to differentially amplify the (1-1)-th differential signal and the (1-2)-th differential signal provided to a (2-1)-th input terminal and a (2-2)-th input terminal, respectively, and output a (2-1)-th differential signal and a (2-2)-th differential signal. A demodulation circuit is configured to filter the (2-1)-th differential signal and the (2-2)-th differential signal and output demodulated differential signals.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyung Tea Park, Ji Woong Kim, Hyung Gun Ma, Seong An Park, Seong Joo Lee, Tae Hun Lee, Sang Hyun Heo
  • Publication number: 20230247823
    Abstract: A semiconductor memory device includes a substrate including a cell area and a peripheral area defined by a periphery of the cell area, the cell area including a dummy cell area and a normal cell area, and an active area defined by a cell element isolation film. The device includes a cell area separation film defining the cell area in the substrate, the dummy cell area defining a boundary with the cell area separation film between the normal cell area and the cell area separation film. The device includes a normal bit-line on the normal cell area and extending in a first direction, a dummy bit-line group on the dummy cell area, the dummy bit-line group including a plurality of dummy bit-lines extending in the first direction, and a plurality of storage contacts connected to the active area and located along a second direction perpendicular to the first direction.
    Type: Application
    Filed: November 16, 2022
    Publication date: August 3, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seongkeun CHO, Jae Seong Park, Youngseok Kim, Young Sin Kim, Daeyoung Moon, Keum Joo Lee, Sung-Wook Jung, Sungduk Hong, Suhwan Hwang
  • Patent number: 11708564
    Abstract: The present disclosure relates to a microorganism expressing active D-proline reductase.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: July 25, 2023
    Assignee: CJ CHEILJEDANG CORPORATION
    Inventors: Jinseung Park, Bo Seong Park, Young Lyeol Yang, In Seok Oh, Nahum Lee, Jun Ok Moon
  • Publication number: 20230230834
    Abstract: An extreme ultra-violet (EUV) lithography process includes lithographically patterning first through fourth photoresist regions on respective first through fourth regions of a semiconductor substrate, in sequence, using a mask. This mask includes a main area in which a main pattern is defined, a first dummy area in which a first dummy pattern is defined, a second dummy area in which a plurality of second sub-dummy patterns are defined at corresponding corners of the mask, and an alignment area including an alignment pattern therein that is spaced farther from a center of the main area relative to the first and second dummy areas. During the lithographically patterning, at least part of the alignment area on the first region of the substrate is exposed at least three times to EUV light, using the mask.
    Type: Application
    Filed: October 6, 2022
    Publication date: July 20, 2023
    Inventors: Hyun Jae Lee, Hee Seung Ahn, In Seong Park, Yun-Ju Han
  • Patent number: D996627
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: August 22, 2023
    Assignees: RECENSMEDICAL, INC., UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
    Inventors: Gun Ho Kim, Kyong Kwan Ro, Boo Seong Park, Chul Ho Lee, Ho Young Joo, Eun Ho Kim