Abstract: The present disclosure relates to an ultraviolet light-blocking composition containing a centipede grass extract and a cosmetic composition and, more specifically, to an ultraviolet light-blocking composition comprising a centipede grass (Eremochloa ophiuroides) leaf extract as an active ingredient; and a cosmetic composition containing the ultraviolet light-blocking composition.

Abstract: A method for etching a contact for forming a contact hole having a sidewall profile with a single process by controlling a flow rate of carrier gas at an etcher having a mixture of gases, the mixture including CF.sub.4, a polymer forming gas and a carrier gas, including steps for forming an insulation layer on a substrate, exposing a portion of the insulation layer by providing a photoresist pattern on the insulation layer, etching the insulation layer to form the contact hole, the contact hole having a sloped sidewall. The step of etching the insulation layer includes the steps of, introducing a plurality of gases into an etching chamber, the plurality of gases including a first gas including CF.sub.4, a second gas including a polymer forming gas, and a third gas including a balance gas and controlling a flow rate into the etching chamber of the balance gas, and removing the photoresist pattern from the insulation layer.

Abstract: A method for forming a contact hole for a semiconductor device includes forming an insulation layer on a substrate and forming a photoresist film pattern on the insulation layer and exposing a portion of the insulation layer corresponding to the photoresist film pattern. The insulation layer is etched using the photoresist film pattern as a mask using a high density plasma etcher of an inductively coupled plasma type. The photoresist film is removed to form a contact hole having a sloped side wall.

Abstract: A flash EEPROM cell structure and a method for forming it. The method of forming the EEPROM cell includes the steps of: forming a plurality of trenches on a substrate, the trenches being filled with an insulating layer; forming bit lines between the trenches and on the substrate; forming an insulating layer on the bit lines; forming a floating gate, with at least one side of it contacting with the bit lines; and simultaneously forming a control gate and an erasing gate. The control gate and the erasing gate cross the bit lines and the floating gate. The erasing gate also extends over the trenches. The floating gate and the erasing gate extend down into the trenches.

Abstract: A flash EEPROM cell structure and a method for forming it. The method of forming the EEPROM cell includes the steps of: forming a plurality of trenches on a substrate, the trenches being filled with an insulating layer; forming bit lines between the trenches and on the substrate; forming an insulating layer on the bit lines; forming a floating gate, with at least one side of it contacting with the bit lines; and simultaneously forming a control gate and an erasing gate. The control gate and the erasing gate cross the bit lines and the floating gate. The erasing gate also extends over the trenches. The floating gate and the erasing gate extend down into the trenches.