Patents by Inventor Seong Wook Yoo

Seong Wook Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103250
    Abstract: A lens moving apparatus can include a cover member comprising an upper plate and a lateral plate extending from the upper plate, a bobbin disposed in the cover member, a coil disposed on the bobbin, a driving magnet disposed between the coil and the lateral plate of the cover member, and a sensing magnet disposed on the bobbin. Also, the lens moving apparatus can further include a circuit board disposed on the lateral plate of the cover member, and a position sensor disposed on the circuit board and configured to sense the sensing magnet, in which a part of the coil is disposed between the sensing magnet and the circuit board.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: LG INNOTEK CO., LTD.
    Inventors: Seong Min LEE, Sang Ok PARK, Hyune O YOO, Byung Wook SON, Jun Taek LEE
  • Patent number: 9900098
    Abstract: An optical device module includes a substrate, an interlayer insulating layer on the substrate, an optical waveguide on the interlayer insulating layer, an optical device on the optical waveguide, and a prism disposed between the optical device and the optical waveguide. The prism has a refractive index greater than a refractive index of the optical waveguide.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: February 20, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sahnggi Park, Sang Gi Kim, Seong Wook Yoo, Gyungock Kim
  • Publication number: 20150283743
    Abstract: Provided is a method of fabricating a mold, the method including: forming a first preliminary layer and a second preliminary layer, which are spaced apart from each other and stacked on a substrate; forming a first pattern by patterning the first preliminary layer; forming a first spacer on both sidewalls of the first pattern; forming a second pattern by etching the second preliminary layer by using the first spacer as an etching mask; forming a multilayer structure including the first pattern and the second pattern on the substrate by removing the first spacer; and forming a mold layer covering the multilayer structure.
    Type: Application
    Filed: October 17, 2014
    Publication date: October 8, 2015
    Inventors: Jong-Moon PARK, Kunsik PARK, Dong Suk JUN, Seong Wook YOO, Sang Gi KIM, Jin Ho LEE
  • Publication number: 20150215045
    Abstract: An optical device module includes a substrate, an interlayer insulating layer on the substrate, an optical waveguide on the interlayer insulating layer, an optical device on the optical waveguide, and a prism disposed between the optical device and the optical waveguide. The prism has a refractive index greater than a refractive index of the optical waveguide.
    Type: Application
    Filed: April 10, 2015
    Publication date: July 30, 2015
    Inventors: Sahnggi PARK, Sang Gi KIM, Seong Wook YOO, Gyungock KIM
  • Patent number: 9031365
    Abstract: An optical device module includes a substrate, an interlayer insulating layer on the substrate, an optical waveguide on the interlayer insulating layer, an optical device on the optical waveguide, and a prism disposed between the optical device and the optical waveguide. The prism has a refractive index greater than a refractive index of the optical waveguide.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: May 12, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sahnggi Park, Sang Gi Kim, Seong Wook Yoo, Gyungock Kim
  • Patent number: 8975692
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: March 10, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Gi Kim, Jin-Gun Koo, Seong Wook Yoo, Jong-Moon Park, Jin Ho Lee, Kyoung Il Na, Yil Suk Yang, Jongdae Kim
  • Publication number: 20140241662
    Abstract: An optical device module includes a substrate, an interlayer insulating layer on the substrate, an optical waveguide on the interlayer insulating layer, an optical device on the optical waveguide, and a prism disposed between the optical device and the optical waveguide. The prism has a refractive index greater than a refractive index of the optical waveguide.
    Type: Application
    Filed: July 2, 2013
    Publication date: August 28, 2014
    Inventors: Sahnggi PARK, Sang Gi KIM, Seong Wook YOO, Gyungock KIM
  • Publication number: 20140091388
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.
    Type: Application
    Filed: December 9, 2013
    Publication date: April 3, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sang Gi KIM, Jin-Gun KOO, Seong Wook YOO, Jong-Moon PARK, Jin Ho LEE, KYOUNG IL NA, Yil Suk Yang, Jongdae KIM
  • Patent number: 8629020
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: January 14, 2014
    Assignee: Electronics & Telecommunications Research Institute
    Inventors: Sang Gi Kim, Jin-Gun Koo, Seong Wook Yoo, Jong-Moon Park, Jin Ho Lee, Kyoung Il Na, Yil Suk Yang, Jongdae Kim
  • Publication number: 20120098057
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The method includes: forming a trench in a semiconductor substrate of a first conductive type; forming a trench dopant containing layer including a dopant of a second conductive type on a sidewall and a bottom surface of the trench; forming a doping region by diffusing the dopant in the trench dopant containing layer into the semiconductor substrate; and removing the trench dopant containing layer.
    Type: Application
    Filed: September 9, 2011
    Publication date: April 26, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sang Gi KIM, Jin-Gun Koo, Seong Wook Yoo, Jong-Moon Park, Jin Ho Lee, Kyoung Il Na, Yil Suk Yang, Jongdae Kim
  • Patent number: 7855366
    Abstract: A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: December 21, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kun Sik Park, Yong Sun Yoon, Bo Woo Kim, Jin Yeong Kang, Jong Moon Park, Seong Wook Yoo
  • Publication number: 20090321641
    Abstract: A BJT (bipolar junction transistor)-based uncooled IR sensor and a manufacturing method thereof are provided. The BJT-based uncooled IR sensor includes: a substrate; at least one BJT which is formed to be floated apart from the substrate; and a heat absorption layer which is formed on an upper surface of the at least one BJT, wherein the BJT changes an output value according heat absorbed through the heat absorption layer. Accordingly, it is possible to provide a BJT-based uncooled IR sensor capable of being implemented through a CMOS compatible process and obtaining more excellent temperature change detection characteristics.
    Type: Application
    Filed: April 29, 2008
    Publication date: December 31, 2009
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kun Sik PARK, Yong Sun YOON, Bo Woo KIM, Jin Yeong KANG, Jong Moon PARK, Seong Wook YOO
  • Patent number: 7190432
    Abstract: Provided is a wafer exposure apparatus used in a semiconductor device manufacturing process, the exposure apparatus including: a reflective mirror for reflecting light provided from a light source; an optical path changer for changing a path of the light provided from the reflective mirror; first mirrors installed at both sides of the optical path changer to change the path of the light; second mirrors installed at both sides of a material to change the path of the light; and third mirrors installed at both sides of a mask to enter the light reflected by the first mirrors to the mask and to enter the light passed through the mask into the second mirrors, whereby it is possible to continuously expose one surface, both surfaces or a specific surface of a wafer in a state that the wafer is once aligned.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: March 13, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Gi Kim, Ju Wook Lee, Jong Moon Park, Seong Wook Yoo, Kun Sik Park, Yong Sun Yoon, Yoon Kyu Bae, Byung Won Lim, Jin Gun Koo, Boo Woo Kim
  • Patent number: 7170044
    Abstract: Provided is a photodetector in which a transparent nonconductive material having an interface charge and a trapped charge is deposited on a semiconductor surface so as to form a depletion region on the surface of the semiconductor, and the depletion region is employed as an optical detecting region, thereby not only improving detection with respect to light having a wavelength of ultraviolet and blue ranges but also filtering light having a wavelength of visible and infrared ranges, and in which a fabricating process thereof is compatible with a universal silicon CMOS process.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: January 30, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kun Sik Pakr, Seong Wook Yoo, Jong Moon Park, Yong Sun Yoon, Sang Gi Kim, Bo Woo Kim, Yoon Kyu Bae, Byung Won Lim, Jin Gun Koo
  • Patent number: 7141464
    Abstract: Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: November 28, 2006
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Moon Park, Kun Sik Park, Seong Wook Yoo, Yong Sun Yoon, Sang Gi Kim, Yoon Kyu Bae, Byung Won Lim, Jin Gun Koo, Bo Woo Kim
  • Publication number: 20060109444
    Abstract: Provided is a wafer exposure apparatus used in a semiconductor device manufacturing process, the exposure apparatus including: a reflective mirror for reflecting light provided from a light source; an optical path changer for changing a path of the light provided from the reflective mirror; first mirrors installed at both sides of the optical path changer to change the path of the light; second mirrors installed at both sides of a material to change the path of the light; and third mirrors installed at both sides of a mask to enter the light reflected by the first mirrors to the mask and to enter the light passed through the mask into the second mirrors, whereby it is possible to continuously expose one surface, both surfaces or a specific surface of a wafer in a state that the wafer is once aligned.
    Type: Application
    Filed: October 13, 2005
    Publication date: May 25, 2006
    Inventors: Sang Gi Kim, Ju Wook Lee, Jong Moon Park, Seong Wook Yoo, Kun Sik Park, Yong Sun Yoon, Yoon Kyu Bae, Byung Won Lim, Jin Gun Koo, Boo Woo Kim
  • Publication number: 20060079030
    Abstract: Provided is a method of fabricating a T-type gate including the steps of: forming a first photoresist layer, a blocking layer and a second photoresist layer to a predetermined thickness on a substrate, respectively; forming a body pattern of a T-type gate on the second photoresist layer and the blocking layer; exposing a predetermined portion of the second photoresist layer to form a head pattern of the T-type gate, and performing a heat treatment process to generate cross linking at a predetermined region of the second photoresist layer except for the head pattern of the T-type gate; performing an exposure process on an entire surface of the resultant structure, and then removing the exposed portion; and forming a metal layer of a predetermined thickness on an entire surface of the resultant structure, and then removing the first photoresist layer, the blocking layer, the predetermined region of the second photoresist layer in which the cross linking are generated, and the metal layer, whereby it is possible
    Type: Application
    Filed: July 12, 2005
    Publication date: April 13, 2006
    Inventors: Jong Moon Park, Kun Sik Park, Seong Wook Yoo, Yong Sun Yoon, Sang Gi Kim, Yoon Kyu Bae, Byung Won Lim, Jin Gun Koo, Bo Woo Kim
  • Patent number: 6159846
    Abstract: The method of metallization in semiconductor devices provides a substrate having a conducting region and having an insulating layer formed on the substrate. The insulating layer has a contact hole which exposes the conducting region. Next, a silicon-containing metallization layer and a silicon-free metallization layer are sequentially formed on the insulating layer such that the silicon-containing metallization layer contacts the conducting region through the contact hole. After heat-treating the substrate, the two metallization layers are patterned.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: December 12, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Seong-Wook Yoo