Patents by Inventor Seong-young Han

Seong-young Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7804693
    Abstract: There are provided a printed circuit board having a structure for relieving a stress concentration on an outer most lead of leads, due to a difference in thermal expansion coefficients between the semiconductor device and the printed circuit board when the semiconductor device is mounted on the printed circuit board. The printed circuit board includes an inner lead portion to be connected to the semiconductor device. The inner lead portion includes a plurality of leads, arranged in parallel with a same pitch in a predetermined area, and additional leads located near both ends of the predetermined area in which the plurality of leads are arranged in parallel, respectively, wherein each of the plurality of leads has a pitch smaller than 30 ?m and a width of the additional lead is wider than 20 ?m. There are also provided a semiconductor chip package equipped with the printed circuit board according to the present invention.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: September 28, 2010
    Assignee: Samsung Techwin Co., Ltd.
    Inventors: Chang-soo Jang, Jae-chul Ryu, Seong-young Han
  • Patent number: 7129719
    Abstract: Provided is an apparatus for detecting a defect of a circuit pattern which includes a resonator, a first power supply unit connected to one end of the resonator to apply power to the resonator, a probe connected to the other end of the resonator to contact one end of the circuit pattern, a second power supply unit connected to the other end of the circuit pattern to apply a voltage thereto, and a detection portion connected between the resonator and the probe to measure a voltage generated from the circuit pattern and generate a measurement voltage, and determine presence of a defect in the circuit pattern from the measurement voltage.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: October 31, 2006
    Assignee: Samsung Techwin Co., Ltd.
    Inventors: Boo-Yang Jung, Seong-Young Han, Bruce Kim
  • Publication number: 20060016619
    Abstract: There are provided a printed circuit board having a structure for relieving a stress concentration on an outer most lead of leads, due to a difference in thermal expansion coefficients between the semiconductor device and the printed circuit board when the semiconductor device is mounted on the printed circuit board. The printed circuit board includes an inner lead portion to be connected to the semiconductor device. The inner lead portion includes a plurality of leads, arranged in parallel with a same pitch in a predetermined area, and additional leads located near both ends of the predetermined area in which the plurality of leads are arranged in parallel, respectively, wherein each of the plurality of leads has a pitch smaller than 30 ?m and a width of the additional lead is wider than 20 ?m. There are also provided a semiconductor chip package equipped with the printed circuit board according to the present invention.
    Type: Application
    Filed: June 27, 2005
    Publication date: January 26, 2006
    Applicant: Samsung Techwin Co., Ltd.
    Inventors: Chang-soo Jang, Jae-chul Ryu, Seong-young Han
  • Publication number: 20050264306
    Abstract: Provided is an apparatus for detecting a defect of a circuit pattern which includes a resonator, a first power supply unit connected to one end of the resonator to apply power to the resonator, a probe connected to the other end of the resonator to contact one end of the circuit pattern, a second power supply unit connected to the other end of the circuit pattern to apply a voltage thereto, and a detection portion connected between the resonator and the probe to measure a voltage generated from the circuit pattern and generate a measurement voltage, and determine presence of a defect in the circuit pattern from the measurement voltage.
    Type: Application
    Filed: June 1, 2004
    Publication date: December 1, 2005
    Inventors: Boo-Yang Jung, Seong-Young Han, Bruce Kim
  • Patent number: 6310389
    Abstract: A method of manufacturing a semiconductor package including the steps of adhering inner leads to a semiconductor chip surface via an insulating adhesive, forming an insulating layer on the semiconductor chip and upper surfaces of the inner leads such that bonding pads formed on the semiconductor chip and portions of the inner leads are exposed through an opening, forming a conductive layer in the opening to electrically connect the bonding pads to the inner leads, and forming a semiconductor package by molding the semiconductor chip, the inner leads, the insulating layer, and the conductive layer with a molding material.
    Type: Grant
    Filed: April 24, 1998
    Date of Patent: October 30, 2001
    Assignee: Samsung Aerospace Industries, Ltd.
    Inventor: Seong-young Han
  • Patent number: 6084204
    Abstract: A leadframe manufacturing apparatus includes a laser beam generator, a laser beam path tube through which laser beams travel, a leadframe transferring unit which transfers leadframe material to be irradiated by the laser beams, a controller connected to the laser beam generator and the leadframe transferring unit, which controls the transfer and irradiation of the leadframe material, a laser mask having a predetermined pattern, placed between the laser beam generator and the leadframe transferring unit, and a laser beam absorbing unit for supporting the leadframe transferring unit. A leadframe may also be manufactured by coating a leadframe material with a photoresist film capable of blocking the laser beams, and then patterning the photoresist film.
    Type: Grant
    Filed: April 20, 1998
    Date of Patent: July 4, 2000
    Assignee: Samsung Aerospace Industries, Ltd.
    Inventor: Seong-young Han