Abstract: An organic light emitting diode (OLED) includes a first emitting material layer disposed adjacently to a first electrode and a second emitting material layer disposed adjacently to a second electrode. The first emitting material layer includes a first compound having high affinity to holes and a second compound of thermally activated delayed fluorescent material, and the second emitting material layer includes a fourth compound having high affinity to electrons and implementing triplet-triplet annihilation. Two emitting material layers having adjusted energy levels allow the OLED to lower its driving voltages and improve its luminous efficiency and luminous lifetime.

Abstract: A dryer appliance and a method of operating a dryer appliance are provided. The dryer includes a drum defining a drying chamber rotatably mounted within a cabinet, an additive dispensing assembly to provide a dryer additive to the drying chamber, and a controller for initiating a drying operation. The controller obtains washer operating parameters from a washing machine, determines a drying operation based on the received parameters, initiates a dry cycle, and directs a dryer additive to be dispensed based on the dryer operating schedule.

Abstract: The present disclosure provides an organic light emitting diode including a first electrode; a second electrode facing the first electrode; and an emitting material layer including a first compound and a second compound positioned between the first and second electrodes, wherein the first compound includes a hexagonal-ring moiety including one boron atom, one oxygen atom and four carbon atoms, and the second compound includes a hexagonal-ring moiety including one boron atom, one nitrogen atom and four carbon atoms, and an organic light emitting device including the organic light emitting diode.

Abstract: The present disclosure relates to a novel PLK1 degradation inducing compound having a structure according to Formula I, a method for preparing the same, and the use thereof. The compounds of the present disclosure exhibit an effect of inducing PLK1 degradation. Therefore, the compounds of the present disclosure may be effectively utilized for preventing or treating PLK1-related diseases.

Abstract: A method of operating a washing machine appliance includes measuring a humidity value with the humidity sensor and comparing the measured humidity value to an expected humidity value. The method also includes flagging a fault in response to the measured humidity value differing from the expected humidity value by at least a predetermined threshold.

Abstract: The present disclosure relates to a novel PLK1 degradation inducing compound having a structure according to Formula I, a method for preparing the same, and the use thereof. The compounds of the present disclosure exhibit an effect of inducing PLK1 degradation. Therefore, the compounds of the present disclosure may be effectively utilized for preventing or treating PLK1-related diseases.

Abstract: A termination circuit is provided. The termination device includes terminals configured to receive a corresponding signal; unit circuits respectively connected to the terminals, the unit circuits each including a unit resistor and a unit switch element connected to each other in series; common mode capacitors; first switch elements respectively connected between each of the unit circuits and a first corresponding common mode capacitor of common mode capacitors, each of the first switch elements being configured to turn on when the corresponding signal is received in a first mode; and second switch elements respectively connected between each of the unit circuits and a second corresponding common mode capacitor of the common mode capacitors, the second switch elements being configured to turn on when the corresponding signal is received in a second mode different from the first mode.

Abstract: A termination circuit is provided. The termination device includes terminals configured to receive a corresponding signal; unit circuits respectively connected to the terminals, the unit circuits each including a unit resistor and a unit switch element connected to each other in series; common mode capacitors; first switch elements respectively connected between each of the unit circuits and a first corresponding common mode capacitor of common mode capacitors, each of the first switch elements being configured to turn on when the corresponding signal is received in a first mode; and second switch elements respectively connected between each of the unit circuits and a second corresponding common mode capacitor of the common mode capacitors, the second switch elements being configured to turn on when the corresponding signal is received in a second mode different from the first mode.

Abstract: A negative-level shifting circuit includes a first level shifter including an input circuit configured to receive a logic signal having a first voltage level and a load circuit configured to generate a first output signal having a second voltage level based on a voltage generated by the input circuit, and a second level shifter configured to receive the first output signal from the first level shifter and generate a second output signal having a third voltage level. The first level shifter further includes a shielding circuit connected between the input circuit and the load circuit and configured to separate an operating voltage region of the input circuit from an operating voltage region of the load circuit such that the input circuit operates in a positive voltage region and the load circuit operates in a negative voltage region.

Abstract: A display driving circuit in accordance with the inventive concepts may include a source amplifier. The source amplifier may include an output transistor configured to amplify an input signal to generate an output signal, and charge a source line of a display panel using the output signal. The source amplifier may include an output transistor switch configured to control the output transistor, and a switch control block configured to receive configuration bits including on/off time information of the output transistor switch to generate a switch control signal. The on/off time information includes information for turning on the output transistor switch in synchronization with a horizontal synchronous signal associated with the display panel, and information for turning off the output transistor switch at a time when the source line of the display panel is charged to a desired charge level.

Abstract: A charge sharing method, device, and system is disclosed. For example, a charge sharing method for a display driver is disclosed. The method includes: receiving a first row of data for a first row of source lines; receiving a second row of data for a second row of source lines; for each source line of at least a first group of the source lines, determining whether a change amount between data for that source line from the first row of data and data for that source line from the second row of data is above a threshold; and performing selective charge sharing based on the determinations.

Abstract: A negative-level shifting circuit includes a first level shifter including an input circuit configured to receive a logic signal having a first voltage level and a load circuit configured to generate a first output signal having a second voltage level based on a voltage generated by the input circuit, and a second level shifter configured to receive the first output signal from the first level shifter and generate a second output signal having a third voltage level. The first level shifter further includes a shielding circuit connected between the input circuit and the load circuit and configured to separate an operating voltage region of the input circuit from an operating voltage region of the load circuit such that the input circuit operates in a positive voltage region and the load circuit operates in a negative voltage region.

Abstract: A display driving circuit includes a frame buffer that stores a plurality of pieces of line data, and a buffer controller. The buffer controller receives a data packet, and outputs first line data included in the data packet or second line data stored in the frame buffer as grayscale data based on flag information included in the data packet.

Abstract: A driving apparatus and a display driving system. The driving apparatus includes a first amplification unit receiving a first signal and outputting a driving signal of a positive polarity voltage with respect to a reference voltage, a second amplification unit receiving a second signal and outputting a driving signal of a negative polarity voltage with respect to the reference voltage, and a controller for determining a chopping signal applied to a chopping terminal of the second amplification unit such that an offset polarity of an output voltage of the first amplification unit and an offset polarity of an output voltage of the second amplification unit are the same.

Abstract: A charge sharing method, device, and system is disclosed. For example, a charge sharing method for a display driver is disclosed. The method includes: receiving a first row of data for a first row of source lines; receiving a second row of data for a second row of source lines; for each source line of at least a first group of the source lines, determining whether a change amount between data for that source line from the first row of data and data for that source line from the second row of data is above a threshold; and performing selective charge sharing based on the determinations.

Abstract: A display driving circuit in accordance with the inventive concepts may include a source amplifier. The source amplifier may include an output transistor configured to amplify an input signal to generate an output signal, and charge a source line of a display panel using the output signal. The source amplifier may include an output transistor switch configured to control the output transistor, and a switch control block configured to receive configuration bits including on/off time information of the output transistor switch to generate a switch control signal. The on/off time information includes information for turning on the output transistor switch in synchronization with a horizontal synchronous signal associated with the display panel, and information for turning off the output transistor switch at a time when the source line of the display panel is charged to a desired charge level.

Abstract: A display device includes a display panel having pixels arranged at intersections of source lines and gate lines, a plurality of source drivers configured to dispersedly output image data signals to the source lines in response to source control signals and a data packet, a plurality of gate drivers configured to drive gate lines in response to gate control signals so as to be connected with pixels corresponding to the source lines, and a timing controller configured to output the data packet, the source control signals, and the gate control signals. At least one of the plurality of source drivers is configured to output carry information associated with an output of the image data signals, and at least another of the plurality of source drivers is configured to output the image data signals in response to the carry information.

Abstract: A driving apparatus and a display driving system. The driving apparatus includes a first amplification unit receiving a first signal and outputting a driving signal of a positive polarity voltage with respect to a reference voltage, a second amplification unit receiving a second signal and outputting a driving signal of a negative polarity voltage with respect to the reference voltage, and a controller for determining a chopping signal applied to a chopping terminal of the second amplification unit such that an offset polarity of an output voltage of the first amplification unit and an offset polarity of an output voltage of the second amplification unit are the same.

Abstract: Display devices are provided. The display devices may include a source driver chip between a printed circuit board and a display panel. The source driver chip may overlap a plurality of bypass lines that are connected to the printed circuit board and the display panel.