Abstract: Disclosed is a method of rapidly and precisely predicting lithium ion conductivity of a solid electrolyte. The method may include simulating a crystal structure of the solid electrolyte and creating training sets based on the crystal structure for machine learning; calculating a potential specific to the simulated crystal structure by machine learning using the training sets; and predicting the lithium ion conductivity of the solid electrolyte from the potential using molecular dynamics simulations.

Abstract: An external lighting apparatus delivers various messages through selective lighting by applying a lighting function to the exterior of a vehicle. The apparatus includes a light source module with a plurality of light sources and a light guide in which light emitted from the light sources is incident. The light guide reflects the incident light so that the light travels in different areas. The apparatus has a light cover composed of a plurality of transmission parts into which the light, travelling in different areas via the light guide, is incident. The light is emitted to different lighting areas through each transmission part to create a plurality of illumination images.

Abstract: The present invention provides an aluminum-based plated steel plate used in hot-press forming, the steel plate comprising: a base steel plate; and a plating layer formed on the base steel plate, wherein the plating layer comprises: an alloying layer formed on the surface of the base steel plate and including one or more of Fe 3Al, FeAl(Si), Fe 2Al 5, and FeAl 3; and an aluminum layer formed on the alloying layer and having a thickness less than 10% of the thickness of the plating layer, and the plating layer has a thickness of 5-20 ?m and an oxygen content of 10 weight % or less, as measured by GDS, at a depth of 0.1 ?m from the surface of the plating layer.

Abstract: An external lighting apparatus delivers various messages through selective lighting by applying a lighting function to the exterior of a vehicle. The apparatus includes a light source module with a plurality of light sources and a light guide in which light emitted from the light sources is incident. The light guide reflects the incident light so that the light travels in different areas. The apparatus has a light cover composed of a plurality of transmission parts into which the light, travelling in different areas via the light guide, is incident. The light is emitted to different lighting areas through each transmission part to create a plurality of illumination images.

Abstract: Provided is an operation method for a digital hologram implementation device including a backlight and a spatial light modulator, the operation method including setting an initial phase value of an optical signal to a remedy phase, computing a reduced phase based on the remedy phase, correcting the remedy phase based on a difference between the reduced phase and a preset optimized phase, determining whether the corrected remedy phase is a stabilized phase, performing forward propagation on the stabilized phase and an amplitude of the optical signal, correcting the amplitude of the optical signal, performing backward propagation on the corrected amplitude and the stabilized phase, and determining whether a phase derived by the backward propagation is an optimized phase.

Abstract: A scan driver includes: a plurality of stages, each stage including: a logic circuit configured to transfer an input signal to a first node in response to a first clock signal, and to bootstrap the first node in response to a second clock signal; a carry output circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to a voltage of the bootstrapped first node; and a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal.

Abstract: A scan driver includes: a plurality of stages, each stage including: a logic circuit configured to transfer an input signal to a first node in response to a first clock signal, and to bootstrap the first node in response to a second clock signal; a carry output circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to a voltage of the bootstrapped first node; and a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal.

Abstract: A scan driver includes: a plurality of stages, each stage including: a logic circuit configured to transfer an input signal to a first node in response to a first clock signal, and to bootstrap the first node in response to a second clock signal; a carry output circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to a voltage of the bootstrapped first node; and a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal.

Abstract: A display device includes: a plurality of pixels; a first pixel unit comprising a first portion of the plurality of pixels; a second pixel unit comprising a second portion of the plurality of pixels; and a data driver configured to supply a data voltage to the first pixel unit and the second pixel unit, wherein the data driver is configured to generate a data voltage to be supplied to the first pixel unit based on different gamma voltages even when the same grayscale is expressed according to a driving method, and the second pixel unit is configured to be driven or not driven according to the driving method.

Abstract: A display device relates to a test image measuring device, and includes a housing including one side in which an opening is defined, and a reflector provided to be inclined by a predetermined angle from another side of the housing facing the opening, where a display device including a display unit and an imaging unit is provided above the opening, and a test image displayed from the display unit is photographed by the imaging unit through the reflector.

Abstract: A scan driver includes: a plurality of stages, each stage including: a logic circuit configured to transfer an input signal to a first node in response to a first clock signal, and to bootstrap the first node in response to a second clock signal; a carry output circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to a voltage of the bootstrapped first node; and a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal.

Abstract: A display device includes a first display panel; and a second display panel, wherein the first display panel includes a first substrate including a first region and a second region that is thinner than the first region, a first scan driver positioned on one edge of the first region, a second scan driver positioned in the second region, and a plurality of pixels connected to the first scan driver and the second scan driver by a scan line, the second display panel includes a second substrate including a first region and a second region that is thinner than the first region, a first scan driver positioned on one edge of the first region, and a plurality of pixels connected to the first scan driver by a scan line.

Abstract: A scan driver includes: a plurality of stages, each stage including: a logic circuit configured to transfer an input signal to a first node in response to a first clock signal, and to bootstrap the first node in response to a second clock signal; a carry output circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to a voltage of the bootstrapped first node; and a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal.

Abstract: A display device and a driving method thereof are provided. The display device includes a display including a pixel including a double gate transistor and a light emitting diode, a power supply for supplying power to the display, a current sensor for sensing a current flowing in the display or in the light emitting diode, and a gate voltage controller for providing a bias voltage signal to one gate electrode of the double gate transistor.

Abstract: A display device includes: a plurality of pixels; a first pixel unit comprising a first portion of the plurality of pixels; a second pixel unit comprising a second portion of the plurality of pixels; and a data driver configured to supply a data voltage to the first pixel unit and the second pixel unit, wherein the data driver is configured to generate a data voltage to be supplied to the first pixel unit based on different gamma voltages even when the same grayscale is expressed according to a driving method, and the second pixel unit is configured to be driven or not driven according to the driving method.

Abstract: A scan driver includes: a plurality of stages, each stage including: a logic circuit configured to transfer an input signal to a first node in response to a first clock signal, and to bootstrap the first node in response to a second clock signal; a carry output circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to a voltage of the bootstrapped first node; and a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal.

Abstract: A display device and a driving method thereof are provided. The display device includes a display including a pixel including a double gate transistor and a light emitting diode, a power supply for supplying power to the display, a current sensor for sensing a current flowing in the display or in the light emitting diode, and a gate voltage controller for providing a bias voltage signal to one gate electrode of the double gate transistor.

Abstract: A display device relates to a test image measuring device, and includes a housing including one side in which an opening is defined, and a reflector provided to be inclined by a predetermined angle from another side of the housing facing the opening, where a display device including a display unit and an imaging unit is provided above the opening, and a test image displayed from the display unit is photographed by the imaging unit through the reflector.

Abstract: A short circuit detector includes a first transistor connected between a first portion of a data line and a second portion of the data line and including a gate electrode connected to a first node; a second transistor connected between a first voltage source and the first node and including a gate electrode configured to receive a short-circuit test signal; a third transistor connected between a second node included in the second portion and a third node and including a gate electrode configured to receive the short-circuit test signal; a fourth transistor connected between a second voltage source and the first node and including a gate electrode connected to the third node; and a fifth transistor connected to the first node and a third voltage source and including a gate electrode connected to the third node in common with the gate electrode of the third transistor.

Abstract: A short circuit detector includes a first transistor connected between a first portion of a data line and a second portion of the data line and including a gate electrode connected to a first node; a second transistor connected between a first voltage source and the first node and including a gate electrode configured to receive a short-circuit test signal; a third transistor connected between a second node included in the second portion and a third node and including a gate electrode configured to receive the short-circuit test signal; a fourth transistor connected between a second voltage source and the first node and including a gate electrode connected to the third node; and a fifth transistor connected to the first node and a third voltage source and including a gate electrode connected to the third node in common with the gate electrode of the third transistor.