Patents by Inventor Seongjin MUN

Seongjin MUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12517162
    Abstract: An electromagnetic noise penetration analysis apparatus for analyzing electromagnetic wave noise penetrating a battery management device may include a plurality of internal electrical components grouped as function blocks based on each collective function. The electromagnetic noise penetration analysis apparatus may include one near-field measurement probe positioned near or adjacent to at least one electrical component of an associated function block, the electrical component being previously identified by associated monitoring data operating abnormally during an electromagnetic wave immunity test at a susceptible frequency, and configured to measure intensity of magnetic field near or at the identified electrical component, while simulated electromagnetic noise of a frequency comparable to the susceptible frequency is applied.
    Type: Grant
    Filed: October 17, 2023
    Date of Patent: January 6, 2026
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Mooil Chung, Seongjin Mun
  • Publication number: 20250286156
    Abstract: A battery pack includes a battery module, a module battery management system (BMS) configured to monitor the battery module, a main BMS configured to exchange radio signals with the module BMS through wireless communication, and a signal reflection unit configured to reflect the radio signals exchanged between the module BMS and the main BMS toward the module BMS or the main BMS.
    Type: Application
    Filed: July 10, 2024
    Publication date: September 11, 2025
    Applicant: Sumsung SDI Co., Ltd.
    Inventor: Seongjin Mun
  • Publication number: 20250217562
    Abstract: A method of predicting semiconductor device failure rate and an electronic device for performing the method are provided. The method of predicting semiconductor device failure rate includes receiving schematic data for a unit circuit in a first circuit and layout data corresponding to the schematic data, generating, by at least one processor, a netlist based on the schematic data and the layout data, performing a first simulation on the layout data to generate first simulation data for a test point of the layout data corresponding to a first node in the netlist, applying the first simulation data to a second simulation for the first node to generate second simulation data regarding whether the unit circuit is in fail operation, and calculating a failure rate for the first circuit based on the second simulation data.
    Type: Application
    Filed: September 10, 2024
    Publication date: July 3, 2025
    Inventors: JaeHong Kim, Hyein Lee, Hyein Lim, Se-Young Kim, Seongjin Mun
  • Publication number: 20240353461
    Abstract: An electromagnetic noise penetration analysis apparatus for analyzing electromagnetic wave noise penetrating a battery management device may include a plurality of internal electrical components grouped as function blocks based on each collective function. The electromagnetic noise penetration analysis apparatus may include one near-field measurement probe positioned near or adjacent to at least one electrical component of an associated function block, the electrical component being previously identified by associated monitoring data operating abnormally during an electromagnetic wave immunity test at a susceptible frequency, and configured to measure intensity of magnetic field near or at the identified electrical component, while simulated electromagnetic noise of a frequency comparable to the susceptible frequency is applied.
    Type: Application
    Filed: October 17, 2023
    Publication date: October 24, 2024
    Inventors: Mooil CHUNG, Seongjin MUN
  • Publication number: 20240348061
    Abstract: A battery system includes a battery module that includes one or more battery cells and can be charged and discharged, a battery module manager (BMM) that can monitor a state of the battery module and control the battery module, and a battery management system (BMS) that can receive a signal from the battery module manager and transmit a reset signal that controls the battery module manager to resume communication within the battery system based on the received signal.
    Type: Application
    Filed: October 27, 2023
    Publication date: October 17, 2024
    Inventors: Inbeom JEON, Seongjin MUN, Mooil CHUNG, Peelsik JEON
  • Patent number: 12046930
    Abstract: A battery system includes: a first battery module including a plurality of first battery cells; a second battery module including a plurality of second battery cells; a battery disconnection unit connected between the first battery module and the second battery module, the battery disconnection unit including: a first main switch connected in series between the plurality of first battery cells and the plurality of second battery cells; and a precharge switch and a precharge resistor connected in series with each other and connected in parallel with the first main switch.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: July 23, 2024
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Peelsik Jeon, Inbeom Jeon, Seongjin Mun
  • Patent number: 11907635
    Abstract: A modeling circuit of a field effect transistor includes a first field effect transistor, a first bipolar transistor, a second bipolar transistor and a substrate resistor. The first bipolar transistor has a collector electrode connected to a first node corresponding to a first electrode of the first field effect transistor, an emitter electrode connected to a second node corresponding to a second electrode of the first field effect transistor, and a base electrode. The second bipolar transistor has a collector electrode connected to the second node, an emitter electrode connected to the first node, and a base electrode connected to the base electrode of the first bipolar transistor. The substrate resistor is connected between the base electrodes of the first and second bipolar transistors and a first surface of a semiconductor substrate on which the first field effect transistor is formed.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seongjin Mun, Kiyoung Moon, Hyein Lee
  • Publication number: 20220164516
    Abstract: A modeling circuit of a field effect transistor includes a first field effect transistor, a first bipolar transistor, a second bipolar transistor and a substrate resistor. The first bipolar transistor has a collector electrode connected to a first node corresponding to a first electrode of the first field effect transistor, an emitter electrode connected to a second node corresponding to a second electrode of the first field effect transistor, and a base electrode. The second bipolar transistor has a collector electrode connected to the second node, an emitter electrode connected to the first node, and a base electrode connected to the base electrode of the first bipolar transistor. The substrate resistor is connected between the base electrodes of the first and second bipolar transistors and a first surface of a semiconductor substrate on which the first field effect transistor is formed.
    Type: Application
    Filed: August 2, 2021
    Publication date: May 26, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seongjin MUN, Kiyoung MOON, Hyein LEE
  • Publication number: 20210265844
    Abstract: A battery system includes: a first battery module including a plurality of first battery cells; a second battery module including a plurality of second battery cells; a battery disconnection unit connected between the first battery module and the second battery module, the battery disconnection unit including: a first main switch connected in series between the plurality of first battery cells and the plurality of second battery cells; and a precharge switch and a precharge resistor connected in series with each other and connected in parallel with the first main switch.
    Type: Application
    Filed: February 22, 2021
    Publication date: August 26, 2021
    Inventors: Peelsik JEON, Inbeom JEON, Seongjin MUN