Patents by Inventor Seongmin Ryu

Seongmin Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor apparatus having through vias configured to isolate power supplied to a memory chip from data signals supplied to the memory chip
    Patent number: 8884416
    Abstract: A semiconductor apparatus includes a base substrate and a logic chip disposed on the base substrate. The logic chip includes a memory control circuit, a first through silicon via, and a second through silicon via. The memory control circuit is disposed on a first surface of a substrate of the logic chip, and a memory chip is disposed on a second surface of the substrate of the logic chip. The first through silicon via electrically connects the memory control circuit and the memory chip, the second through silicon via is electrically connected to the memory chip and is configured to transmit power for the memory chip, the second through silicon via is electrically insulated from the logic chip, and the first surface of the substrate of the logic chip faces the base substrate.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: November 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Go Eun Lee, Taeje Cho, Un-Byoung Kang, Seongmin Ryu, Jung-Hwan Kim, Tae Hong Min
  • SEMICONDUCTOR APPARATUS HAVING THROUGH VIAS
    Publication number: 20120018885
    Abstract: A semiconductor apparatus includes a base substrate and a logic chip disposed on the base substrate. The logic chip includes a memory control circuit, a first through silicon via, and a second through silicon via. The memory control circuit is disposed on a first surface of a substrate of the logic chip, and a memory chip is disposed on a second surface of the substrate of the logic chip. The first through silicon via electrically connects the memory control circuit and the memory chip, the second through silicon via is electrically connected to the memory chip and is configured to transmit power for the memory chip, the second through silicon via is electrically insulated from the logic chip, and the first surface of the substrate of the logic chip faces the base substrate.
    Type: Application
    Filed: December 6, 2010
    Publication date: January 26, 2012
    Inventors: Go Eun Lee, Taeje Cho, Un-Byoung Kang, Seongmin Ryu, Jung-Hwan Kim, Tae Hong Min