Patents by Inventor Seon Gyo KIM

Seon Gyo KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162184
    Abstract: A semiconductor package includes a first structure, a first semiconductor chip on the first structure, a first conductive pad on the first structure between the first structure and the first semiconductor chip, a second conductive pad on a lower surface of the first semiconductor chip and vertically overlapping the first conductive pad, a bump connecting the first conductive pad and the second conductive pad, a first adhesive layer surrounding at least a part of side walls of the bump and side walls of the first conductive pad, and a second adhesive layer surrounding at least a part of the side walls of the bump and side walls of the second conductive pad, the second adhesive layer including a material different from the first adhesive layer, wherein a horizontal width of the first adhesive layer is smaller than a horizontal width of the second adhesive layer.
    Type: Application
    Filed: June 19, 2023
    Publication date: May 16, 2024
    Inventors: Sang-Sick Park, Un-Byoung Kang, Min Soo Kim, Seon Gyo Kim
  • Patent number: 11948903
    Abstract: A semiconductor package including a first stack; a plurality of TSVs passing through the first stack; a second stack on the first stack and including a second surface facing a first surface of the first stack; a first pad on the first stack and in contact with the TSVs; a second pad on the second stack; a bump connecting the first and second pads; a first redundancy pad on the first surface of the first stack, spaced apart from the first pad, and not in contact with the TSVs; a second redundancy pad on the second surface of the second stack and spaced apart from the second pad; and a redundancy bump connecting the first redundancy pad and the second redundancy pad, wherein the first pad and first redundancy pad are electrically connected to each other, and the second pad and second redundancy pad are electrically connected to each other.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: April 2, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Sick Park, Un-Byoung Kang, Seon Gyo Kim, Joon Ho Jun
  • Publication number: 20230223373
    Abstract: A semiconductor package including a first stack; a plurality of TSVs passing through the first stack; a second stack on the first stack and including a second surface facing a first surface of the first stack; a first pad on the first stack and in contact with the TSVs; a second pad on the second stack; a bump connecting the first and second pads; a first redundancy pad on the first surface of the first stack, spaced apart from the first pad, and not in contact with the TSVs; a second redundancy pad on the second surface of the second stack and spaced apart from the second pad; and a redundancy bump connecting the first redundancy pad and the second redundancy pad, wherein the first pad and first redundancy pad are electrically connected to each other, and the second pad and second redundancy pad are electrically connected to each other.
    Type: Application
    Filed: March 9, 2023
    Publication date: July 13, 2023
    Inventors: Sang-Sick PARK, Un-Byoung KANG, Seon Gyo KIM, Joon Ho JUN
  • Patent number: 11616039
    Abstract: A semiconductor package including a first stack; a plurality of TSVs passing through the first stack; a second stack on the first stack and including a second surface facing a first surface of the first stack; a first pad on the first stack and in contact with the TSVs; a second pad on the second stack; a bump connecting the first and second pads; a first redundancy pad on the first surface of the first stack, spaced apart from the first pad, and not in contact with the TSVs; a second redundancy pad on the second surface of the second stack and spaced apart from the second pad; and a redundancy bump connecting the first redundancy pad and the second redundancy pad, wherein the first pad and first redundancy pad are electrically connected to each other, and the second pad and second redundancy pad are electrically connected to each other.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: March 28, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Sick Park, Un-Byoung Kang, Seon Gyo Kim, Joon Ho Jun
  • Publication number: 20210407949
    Abstract: A semiconductor package including a first stack; a plurality of TSVs passing through the first stack; a second stack on the first stack and including a second surface facing a first surface of the first stack; a first pad on the first stack and in contact with the TSVs; a second pad on the second stack; a bump connecting the first and second pads; a first redundancy pad on the first surface of the first stack, spaced apart from the first pad, and not in contact with the TSVs; a second redundancy pad on the second surface of the second stack and spaced apart from the second pad; and a redundancy bump connecting the first redundancy pad and the second redundancy pad, wherein the first pad and first redundancy pad are electrically connected to each other, and the second pad and second redundancy pad are electrically connected to each other.
    Type: Application
    Filed: April 1, 2021
    Publication date: December 30, 2021
    Inventors: Sang-Sick PARK, Un-Byoung KANG, Seon Gyo KIM, Joon Ho JUN