Patents by Inventor Seoyeong Lee

Seoyeong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250068333
    Abstract: In some embodiments, an operating method of a storage device includes obtaining a plurality of points by searching for a first valley point between threshold voltage distributions of selection memory cells coupled to a selection word line of a plurality of word lines; calculating, using a first function, a first voltage level that corresponds to a first reference count value; calculating, using a second function, a second voltage level that corresponds to the first reference count value; classifying the selection memory cells into a plurality of coupling patterns according to an aggressor cell group of each of adjacent memory cells coupled to at least one adjacent word line adjacent to the selection word line; and performing a read operation, based on the plurality of coupling patterns of the selection memory cells, the first voltage level, and the second voltage level.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyojin AHN, Seoyeong LEE, Hoon JO
  • Publication number: 20250037777
    Abstract: According to the inventive concept, a memory device may receive a pass voltage signal set in advance from a host and perform a verification operation with respect to a memory cell array based on the received pass voltage signal. The memory device includes an aggressor word line on which a read operation is performed, and a memory block including a victim word line adjacent to the aggressor word line, and a change in a read voltage with respect to the memory block is recorded and the recorded change in the read voltage is sent to the host.
    Type: Application
    Filed: June 25, 2024
    Publication date: January 30, 2025
    Inventors: Hyojin Ahn, Seoyeong Lee, Jungho Lee, Sungjun Hong
  • Patent number: 12189965
    Abstract: In some embodiments, an operating method of a storage device includes obtaining a plurality of points by searching for a first valley point between threshold voltage distributions of selection memory cells coupled to a selection word line of a plurality of word lines; calculating, using a first function, a first voltage level that corresponds to a first reference count value; calculating, using a second function, a second voltage level that corresponds to the first reference count value; classifying the selection memory cells into a plurality of coupling patterns according to an aggressor cell group of each of adjacent memory cells coupled to at least one adjacent word line adjacent to the selection word line; and performing a read operation, based on the plurality of coupling patterns of the selection memory cells, the first voltage level, and the second voltage level.
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: January 7, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyojin Ahn, Seoyeong Lee, Hoon Jo
  • Patent number: 12135897
    Abstract: An operating method of a storage device including a memory controller and a non-volatile memory, the method including: performing a first read in response to a read request by reading data from the non-volatile memory using a default read voltage set; and performing a second read when the first read fails, by calculating a degradation compensation level, using a weight table, offset table, and displacement level, calculating a history read voltage set by performing an operation on the default read voltage set and degradation compensation level, and reading the data using the history read voltage set, wherein the weight table includes weights preset according to word line groups and state read voltages, the offset table includes offset levels preset according to the word line groups and the state read voltages, and the displacement level corresponds to a difference between a default read voltage level and an optimal read voltage level.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: November 5, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyojin Ahn, Seoyeong Lee, Dongwoo Shin, Changjun Lee
  • Publication number: 20240153567
    Abstract: The present disclosure provides apparatuses and methods for operating a flash memory for programming operating system (OS) data before an surface mount technology (SMT) process. In some embodiments, the method includes erasing a plurality of memory cells in a memory block, reducing a lateral charge loss of the plurality of memory cells due to high temperature degradation during the SMT process by applying a pre-program voltage to word lines coupled to the memory block, and performing multi-bit programming of the OS data in the plurality of memory cells, prior to performing the SMT process. The applying of the pre-program voltage causes threshold voltages of the plurality of memory cells to increase.
    Type: Application
    Filed: June 13, 2023
    Publication date: May 9, 2024
    Applicant: Samsung Electronics Co.,Ltd.
    Inventors: Hyojin AHN, Seongkuk KIM, Dongwoo SHIN, Seoyeong LEE, Changjun LEE, Hoon JO
  • Publication number: 20240126453
    Abstract: In some embodiments, an operating method of a storage device includes obtaining a plurality of points by searching for a first valley point between threshold voltage distributions of selection memory cells coupled to a selection word line of a plurality of word lines; calculating, using a first function, a first voltage level that corresponds to a first reference count value; calculating, using a second function, a second voltage level that corresponds to the first reference count value; classifying the selection memory cells into a plurality of coupling patterns according to an aggressor cell group of each of adjacent memory cells coupled to at least one adjacent word line adjacent to the selection word line; and performing a read operation, based on the plurality of coupling patterns of the selection memory cells, the first voltage level, and the second voltage level.
    Type: Application
    Filed: June 28, 2023
    Publication date: April 18, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyojin Ahn, Seoyeong Lee, Hoon Jo
  • Publication number: 20240069790
    Abstract: An operating method of a storage device including a memory controller and a non-volatile memory, the method including: performing a first read in response to a read request by reading data from the non-volatile memory using a default read voltage set; and performing a second read when the first read fails, by calculating a degradation compensation level, using a weight table, offset table, and displacement level, calculating a history read voltage set by performing an operation on the default read voltage set and degradation compensation level, and reading the data using the history read voltage set, wherein the weight table includes weights preset according to word line groups and state read voltages, the offset table includes offset levels preset according to the word line groups and the state read voltages, and the displacement level corresponds to a difference between a default read voltage level and an optimal read voltage level.
    Type: Application
    Filed: April 20, 2023
    Publication date: February 29, 2024
    Inventors: Hyojin AHN, Seoyeong Lee, Dongwoo Shin, Changjun Lee