Patents by Inventor Ser Bok Leng

Ser Bok Leng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8637973
    Abstract: A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: January 28, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Eng Meow Koon, Low Siu Waf, Chan Min Yu, Chia Yong Poo, Ser Bok Leng, Zhou Wei
  • Patent number: 8138617
    Abstract: Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the periphery of a die. The edge contacts are positioned in the saw streets. Each edge contact is connected to one bond pad of each die adjacent the saw street. The edge contact is divided into contacts for each adjacent die when the dies are separated. In an embodiment, a recess is formed in the saw street. In an embodiment, the recess is formed by scribing the saw street with a mechanical cutter. The recess is patterned and contact material is deposited to form the edge contacts.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: March 20, 2012
    Assignee: Round Rock Research, LLC
    Inventors: Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo, Eng Meow Koon, Ser Bok Leng, Chua Swee Kwang, So Chee Chung, Ho Kwok Seng
  • Patent number: 8115306
    Abstract: An apparatus comprises an integrated circuit die including a main body having a top layer, a bottom layer, and a peripheral edge surface extending between the top layer and the bottom layer. The integrated circuit die also includes a bond pad on the main body, an edge contact at the peripheral edge surface and a line connecting the bond pad to the edge contact. The edge contact includes a bottom surface that substantially in the same plane as a surface of an encapsulant encasing the die. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: February 14, 2012
    Assignee: Round Rock Research, LLC
    Inventors: Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Lou, Eng Meow Koon, Ser Bok Leng, Chun Swee Kwang, So Chee Chung, Ho Kwok Song
  • Publication number: 20100140794
    Abstract: An apparatus comprises an integrated circuit die including a main body having a top layer, a bottom layer, and a peripheral edge surface extending between the top layer and the bottom layer. The integrated circuit die also includes a bond pad on the main body, an edge contact at the peripheral edge surface and a line connecting the bond pad to the edge contact. The edge contact includes a bottom surface that substantially in the same plane as a surface of an encapsulant encasing the die. Additional apparatus, systems, and methods are disclosed.
    Type: Application
    Filed: February 12, 2010
    Publication date: June 10, 2010
    Inventors: Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Lou, Eng Meow Koon, Ser Bok Leng, Chun Swee Kwang, So Chee Chung, Ho Kwok Song
  • Patent number: 7675169
    Abstract: Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the periphery of a die. The edge contacts are positioned in the saw streets. Each edge contact is connected to one bond pad of each die adjacent the saw street. The edge contact is divided into contacts for each adjacent die when the dies are separated. In an embodiment, a recess is formed in the saw street. In an embodiment, the recess is formed by scribing the saw street with a mechanical cutter. The recess is patterned and contact material is deposited to form the edge contacts.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: March 9, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Chia Yong Poo, Boon Suan Jeung, Low Slu Waf, Chan Min Yu, Neo Yong Loo, Eng Meow Koon, Ser Bok Leng, Chua Swee Kwang, So Chee Chung, Hu Kwok Seng
  • Patent number: 7358154
    Abstract: Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the periphery of a die. The edge contacts are positioned in the saw streets. Each edge contact is connected to one bond pad of each die adjacent the saw street. The edge contact is divided into contacts for each adjacent die when the dies are separated. In an embodiment, a recess is formed in the saw street. In an embodiment, the recess is formed by scribing the saw street with a mechanical cutter. The recess is patterned and contact material is deposited to form the edge contacts.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: April 15, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo, Eng Meow Koon, Ser Bok Leng, Chua Swee Kwang, So Chee Chung, Ho Kwok Seng
  • Patent number: 7195957
    Abstract: A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: March 27, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Eng Meow Koon, Low Siu Waf, Chan Min Yu, Chia Yong Poo, Ser Bok Leng, Zhou Wei
  • Patent number: 7170161
    Abstract: Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: January 30, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Chan Min Yu, Ser Bok Leng, Low Siu Waf, Chia Yong Poo, Eng Meow Koon
  • Patent number: 6967127
    Abstract: Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: November 22, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Chan Min Yu, Ser Bok Leng, Low Siu Waf, Chia Yong Poo, Eng Meow Koon
  • Patent number: 6894386
    Abstract: Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the periphery of a die. The edge contacts are positioned in the saw streets. Each edge contact is connected to one bond pad of each die adjacent the saw street. The edge contact is divided into contacts for each adjacent die when the dies are separated. In an embodiment, a recess is formed in the saw street. In an embodiment, the recess is formed by scribing the saw street with a mechanical cutter. The recess is patterned and contact material is deposited to form the edge contacts.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: May 17, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo, Eng Meow Koon, Ser Bok Leng, Chua Swee Kwang, So Chee Chung, Ho Kwok Seng
  • Patent number: 6836009
    Abstract: A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: December 28, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Eng Meow Koon, Low Siu Waf, Chan Min Yu, Chia Yong Poo, Ser Bok Leng, Zhou Wei
  • Patent number: 6836008
    Abstract: A semiconductor assembly includes a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads. Components for and methods of forming semiconductor assemblies are included.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: December 28, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Chan Min Yu, Ser Bok Leng, Low Siu Waf, Chia Yong Poo, Eng Meow Koon
  • Publication number: 20040026773
    Abstract: A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.
    Type: Application
    Filed: August 28, 2002
    Publication date: February 12, 2004
    Inventors: Eng Meow Koon, Low Siu Waf, Chan Min Yu, Chia Yong Poo, Ser Bok Leng, Zhou Wei
  • Publication number: 20030193091
    Abstract: A semiconductor assembly includes a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads. Components for and methods of forming semiconductor assemblies are included.
    Type: Application
    Filed: May 1, 2002
    Publication date: October 16, 2003
    Inventors: Chan Min Yu, Ser Bok Leng, Low Siu Waf, Chia Yong Poo, Eng Meow Koon
  • Publication number: 20030194837
    Abstract: Methods of forming a semiconductor assembly includes a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.
    Type: Application
    Filed: April 24, 2003
    Publication date: October 16, 2003
    Inventors: Chan Min Yu, Ser Bok Leng, Low Siu Waf, Chia Yong Poo, Eng Meow Koon
  • Publication number: 20030067001
    Abstract: Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the periphery of a die. The edge contacts are positioned in the saw streets. Each edge contact is connected to one bond pad of each die adjacent the saw street. The edge contact is divided into contacts for each adjacent die when the dies are separated. In an embodiment, a recess is formed in the saw street. In an embodiment, the recess is formed by scribing the saw street with a mechanical cutter. The recess is patterned and contact material is deposited to form the edge contacts.
    Type: Application
    Filed: April 8, 2002
    Publication date: April 10, 2003
    Applicant: Micron Technology, Inc.
    Inventors: Chin Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo, Eng Meow Koon, Ser Bok Leng, Chua Swee Kwang, So Chee Chung, Ho Kwok Seng