Abstract: Embodiments of the present invention are directed to a thermal leadless array package with die attach pad locking feature and methods of producing the same. A copper layer is half-etched on both surfaces to define an array of package contacts and a die attach pad. Each die attach pad is fully embedded in encapsulate material to provide a positive mechanical locking feature for better reliability. In some embodiments, the contacts include four active corner contacts.

Abstract: Embodiments of the present invention are directed to a thermal leadless array package with die attach pad locking feature and methods of producing the same. A copper layer is half-etched on both surfaces to define an array of package contacts and a die attach pad. Each die attach pad is fully embedded in encapsulate material to provide a positive mechanical locking feature for better reliability. In some embodiments, the contacts include four active corner contacts.

Abstract: A leadless integrated circuit (IC) package comprising an IC chip mounted on a die attach pad and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die attach pad are all covered with a molding material, with portions of the electrical contacts and die attach pad protruding from a bottom surface of the molding material.

Abstract: A leadless integrated circuit (IC) package comprising an IC chip mounted on a die attach pad and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die attach pad are all covered with a molding material, with portions of the electrical contacts and die attach pad protruding from a bottom surface of the molding material.

Abstract: A leadless integrated circuit (IC) package comprising an IC chip mounted on a die attach pad and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die attach pad are all covered with a molding material, with portions of the electrical contacts and die attach pad protruding from a bottom surface of the molding material.

Abstract: A process for fabricating an integrated circuit package. Metal is plated up on a substrate to provide a plurality of contact pads and a plurality of fiducial markings on a periphery of the contacts. A transparent mask is selectively deposited on the substrate, over the fiducial markings. A semiconductor die is mounted on the substrate such that the contact pads circumscribe the semiconductor die and the semiconductor die is wire bonded to ones of the contact pads. The wire bonds are encapsulated and the semiconductor die and contact pads are covered in a molding material. The substrate is selectively etched to thereby etch away the substrate underneath the contact pads and the semiconductor die. The integrated circuit package is singulated from other integrated circuit packages by sawing using the fiducial markings.

Abstract: A process for fabricating an integrated circuit package. Metal is plated up on a substrate to provide a plurality of contacts pads and a plurality of fiducial markings on a periphery of the contacts. A transparent mask is selectively deposited on the substrate, over the fiducial markings. A semiconductor die is mounted on the substrate such that the contact pads circumscribe the semiconductor die and the semiconductor die is wire bonded to ones of the contact pads. The wire bonds are encapsulated and the semiconductor die and contact pads are covered in a molding material. The substrate is selectively etched to thereby etch away the substrate underneath the contact pads and the semiconductor die. The integrated circuit package is singulated from other integrated circuit packages by sawing using the fiducial markings.

Abstract: The present invention relates to an integrated circuit package and method of manufacturing an integrated circuit package. In one aspect, the present invention relates to an integrated circuit package including a lead frame having a lead with an inner pad and an outer pad connected by a connection member, wherein a region of the inner pad and a region of the outer pad are separated by a channel extending through a width of the lead. Such an integrated circuit package further includes a semiconductor die electrically coupled with the inner pad of the lead, and an encapsulant material encapsulating at least a portion of said lead frame, wherein a portion of said outer pad is exposed.

Abstract: The present invention relates to an integrated circuit package and method of manufacturing an integrated circuit package. In one aspect, the present invention relates to an integrated circuit package including a lead frame having a lead with an inner pad and an outer pad connected by a connection member, wherein a region of the inner pad and a region of the outer pad are separated by a channel extending through a width of the lead. Such an integrated circuit package further includes a semiconductor die electrically coupled with the inner pad of the lead, and an encapsulant material encapsulating at least a portion of said lead frame, wherein a portion of said outer pad is exposed.

Abstract: The present invention relates to a method of manufacturing an integrated circuit package, including providing a lead frame without a die attachment pad, the lead frame having a ridge portion protruding from a base portion, the ridge portion having an upper surface and defining an upper portion of a cavity, the base portion having a lead and a lower surface, attaching an adhesive strip to at least the lower surface of the base portion to seal a bottom portion of the cavity, encapsulating the cavity such that at least a portion of the upper surface of the ridge portion of the lead frame and at least a portion of the lower surface of the base portion are exposed, and removing the adhesive strip.