Abstract: An adaptive forward differencing apparatus wherein, when rendering curves, calculated x, y values are increased or decreased in order to create values which correspond to the next pixel of the display CRT, such that curves of substantially one pixel increments are continuously and uniformly generated. The apparatus also provides circuitry for generating coordinates of display elements which approximate an ideal vector and to define curves, vectors or objects within maximum and minimum coordinates of the CRT display. The present invention also provides efficient circuitry for computing the value of 1/w of the homogenous coordinate w.

Abstract: A computer system which has a display memory for storing information to be presented on an output display, and a full screen bitmapped window identification memory for storing information regarding window position on an output display, and uses circuitry for comparing incoming information with information stored in the window identification memory to determine whether the incoming information should appear in a particular window of the output display, and also includes a second full screen bitmapped memory normally utilized for storing information indicative of other than window position on an output display and utilizes circuitry for selectively storing information in the second memory regarding window position on the output display when additional windows are required.

Abstract: A computer system comprising a display memory, a window indentification memory, logic circuitry for ascertaining that information to be stored at each position of the display memory is in the correct window by comparing the window number in the window identification memory with the window number of information to be sent to the display memory, and a window identification look-up table activated by window identification signals for providing an output to select the number of bits of color information to be output from the display memory to provide color information for an output device.

Abstract: An apparatus for rapidly switching between output display frames using a shared frame identification memory is disclosed which has particular application to high resolution graphics for animation. Through a plurality of comparison circuitry, the apparatus enables a frame to be displayed during the clock cycles when the frame identification memory is read and during the clock cycles when the frame identification memory is provided with input, thereby, allowing a frame identification memory to be shared by two output display memories. As a result the rapid switching between output display frames sufficient for animation may be achieved with less hardware.

Abstract: A computer output system having a first full screen bitmapped memory, a second full screen bitmapped memory, logic circuitry for providing input signals for writing information to be displayed by an output device to each position of the first memory, logic circuitry for storing in the second memory the positions of each position of the first memory to be written to the output device, and logic circuitry for comparing the signal stored at each position of the first memory and the signal stored at the same position of the second memory to determine whether information at the position is to be written to the output device.

Abstract: An adaptive forward differencing apparatus wherein, when rendering curves, calculated x, y values are increased or decreased in order to create values which correspond to the next pixel of the display CRT, such that curves of substantially one pixel increments are continuously and uniformly generated. The apparatus of the present invention also provides circuitry for generating coordinates of display elements which approximate an ideal vector and to define curves, vectors or objects within maximum and minimum coordinates of the CRT display. The present invention also provides efficient circuitry for computing the value of 1/w of the homogenous coordinate w.

Abstract: The present invention provides apparatus and methods which are most advantageously used in conjunction with a computer display system incorporating the use of a Z-buffer to provide three dimensional hidden surface elimination. A buffer memory is provided which is sufficiently large such that each display element (pixel) on the display is represented by a 16-bit Z value. The Z value corresponds to the Z axis depth of the object at the particular point corresponding to the pixel. The buffer comprises a plurality of dynamic random access memories (D-RAMs) having two operation modes: Normal and Read-Modify-Write (RMW). A counter/pointer register is provided which successively addresses values in the buffer representing successive pixels along scan lines of the display. A graphics processor is provided with coordinates defining a three dimensional image to be displayed and, for each point of the object, computes a current Z.sub.c value beginning at an initial coordinate address in memory.