Patents by Inventor Serge Goossens

Serge Goossens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8949775
    Abstract: Converting from transaction level model to register transfer level. A method comprises accessing a transaction level model description. Function calls in the transaction level model description are automatically converted to signal accesses in a register transfer level description. Interface logic is automatically generated in the register transfer level description. The interface logic provides an interface between a bus interface and the signal accesses. The register transfer level description is stored in a computer readable medium.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: February 3, 2015
    Assignee: Synopsys, Inc.
    Inventor: Serge Goossens
  • Publication number: 20130232465
    Abstract: Converting from transaction level model to register transfer level. A method comprises accessing a transaction level model description. Function calls in the transaction level model description are automatically converted to signal accesses in a register transfer level description. Interface logic is automatically generated in the register transfer level description. The interface logic provides an interface between a bus interface and the signal accesses. The register transfer level description is stored in a computer readable medium.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 5, 2013
    Inventor: Serge Goossens
  • Patent number: 8413106
    Abstract: Converting from transaction level model to register transfer level. A method comprises accessing a transaction level model description. Function calls in the transaction level model description are automatically converted to signal accesses in a register transfer level description. Interlace logic is automatically generated in the register transfer level description. The interface logic provides an interface between a bus interface and the signal accesses. The register transfer level description is stored in a computer readable medium.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: April 2, 2013
    Assignee: Synopsys, Inc.
    Inventor: Serge Goossens
  • Patent number: 7512732
    Abstract: Protocol conversion is disclosed. A first transaction of a first protocol and a second transaction of a second protocol are accessed. From the accessed transactions, a plurality of protocol conversions are computed. Additional transactions of the first protocol and additional transactions of the second protocol can be accessed, and further protocol conversions applicable between the additional first and the second transactions can be computed. Based on at least some of the applicable protocol conversions, a combined controller that is able to convert between the transactions of the first and second protocols is generated. Instructions that are operable to describe the combined controller are stored in a computer readable medium.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: March 31, 2009
    Assignee: COWARE, Inc.
    Inventor: Serge Goossens