Patents by Inventor Serge Robert

Serge Robert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230229874
    Abstract: An intelligent cabinet for dispensing products contained therein that includes an outer wall, an inner liner defining an enclosed interior space adapted for housing an inventory of items, an intermediate layer provided between the outer wall and inner liner, and having a plurality of slots, and a system of modular cassettes including a plurality of cassettes where each cassette is adapted to be fittingly received in and removable from a corresponding slot from the plurality of slots, and a plurality of RFID antennas, where each RFID antennas is separately housed in one of the cassettes from among the plurality of cassettes
    Type: Application
    Filed: June 8, 2021
    Publication date: July 20, 2023
    Applicant: Intelligent Fridges B.V.
    Inventors: Leendert Willem Michiel Lobbezoo, Serge Robert Guy Kremer
  • Patent number: 7394150
    Abstract: A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side of the die, and the edges of the upper lead frame are bent downward around the edges of the die, giving the upper lead frame a cup shape. The edge of the upper lead frame contact another portion of the lower lead frame, so that all of the contacts of the package are coplanar and can be surface-mounted on a printed circuit board. The terminals of the die are electrically connected to the lead frames by means of solder layers. The thicknesses of the respective solder layers that connect the die to the lead frames are predetermined to optimize the performance of the package through numerous thermal cycles. This is done by fabricating the lower lead frame with a plurality of mesas and using a double solder reflow process.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: July 1, 2008
    Assignee: Siliconix incorporated
    Inventors: Mohammed Kasem, King Owyang, Frank Kuo, Serge Robert Jaunay, Sen Mao, Oscar Ou, Peter Wang, Chang-Sheng Chen
  • Patent number: 7238551
    Abstract: A semiconductor package includes a die that is interposed, flip-chip style, between an upper lead frame and a lower lead frame. The lower lead frame has contacts that are aligned with terminals on the bottom surface of the die. The upper lead frame contacts a terminal on the top side of the die, and the edges of the upper lead frame are bent downward around the edges of the die, giving the upper lead frame a cup shape. The edge of the upper lead frame contact another portion of the lower lead frame, so that all of the contacts of the package are coplanar and can be surface-mounted on a printed circuit board. The terminals of the die are electrically connected to the lead frames by means of solder layers. The thicknesses of the respective solder layers that connect the die to the lead frames are predetermined to optimize the performance of the package through numerous thermal cycles. This is done by fabricating the lower lead frame with a plurality of mesas and using a double solder reflow process.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: July 3, 2007
    Assignee: Siliconix incorporated
    Inventors: Mohammed Kasem, King Owyang, Frank Kuo, Serge Robert Jaunay, Sen Mao, Oscar Ou, Peter Wang, Chang-Sheng Chen
  • Patent number: 5244663
    Abstract: Allergens are contained in strictly controlled and reproducible amounts on solid supports to provide a progressive release of the allergen perlingually and sublingually. The compositions are prepared by dissolving an allergen in a polar solvent to obtain a mother solution; preparing dilutions of different predetermined concentrations; fractionating each of the dilutions into sub-dilutions; and impregnating a pharmaceutically acceptable solid support with each sub-dilution, each impregnation step being followed by drying in forced, dried air at a temperature not greater than 30.degree. C.; and applying a protective coating onto the composition.
    Type: Grant
    Filed: February 14, 1991
    Date of Patent: September 14, 1993
    Assignee: Medibrevex
    Inventors: Georges Bruttmann, Patrick Pedrali, Serge Robert
  • Patent number: 5080903
    Abstract: New galenical forms for administering beta-2-mimetics comprising a support conditioned to be placed into the sublingual and perlingual cavity of the mouth, the support made of a pharmaceutically acceptable compound which disintegrates under the action of saliva and progressively releases a controlled amount of the beta-2-mimetics into the sublingual and perlingual cavity of the mouth.
    Type: Grant
    Filed: September 24, 1990
    Date of Patent: January 14, 1992
    Assignee: Societe Civile dite: "Medibrevex"
    Inventors: Josiane Ayache, Jean-Jacques Ayache, Georges Bruttmann, Patrick Pedrali, Serge Robert
  • Patent number: 5061493
    Abstract: In these new galenical forms the corticoid is contained, in strictly controlled and reproducible amounts, in solid supports provided for an extended release of the active ingredient perlingually and sublingually.The corticoid is preferably methylprednisolone.The galenical forms can be prepared as follows:dissolving the corticoid in a solvent,preparing dilutions with different concentrations,fractionating each of these dilutions into subdilutions,impregnating by multi-impregnation or fractionated impregnation a pharmaceutically acceptable solid support with each of the subdilutions, each of said impregnation stages being followed by a drying in forced air dried at a temperature not more than 35.degree. C.
    Type: Grant
    Filed: October 7, 1988
    Date of Patent: October 29, 1991
    Assignee: Medibrevex
    Inventors: Josiane Ayache, Jean-Jacques Ayache, Georges Bruttmann, Patrick Pedrali, Serge Robert
  • Patent number: 4665480
    Abstract: The data processing system according to the invention has a microprocessor and an external erasable and programmable memory. A logic connection system is arranged between control pins of the microprocessor and a controlled pin of the external memory. These control pins of the microprocessor are the program control pin, a port control pin, the controlled pin of the memory and the memory selection pin. This ligic connection system permits using only one memory both for reading and writing of instructions and/or data instead of the two memories generally used.
    Type: Grant
    Filed: June 26, 1986
    Date of Patent: May 12, 1987
    Assignee: U.S. Philips Corporation
    Inventors: Serge Robert, Pierre Fevrier
  • Patent number: 4628308
    Abstract: A network having a series architecture and comprising an electronic master device (M) and a plurality of electronic slave devices (E.sub.1, E.sub.2, . . . ). Each electronic slave device is provided with an associated connection device (30) which enables the electronic slave device to be connected to a common communication channel (2) which interconnects the electronic slave devices and the master device. The common communication channel passes through the connection devices in order to preclude the occurrence of conflicting voltages when one of the electronic slave devices attempts to carry out a transmission to the electronic master device. For this purpose each connection device is equipped with a dedicated-line receiver and a dedicated-line transmitter in cascade, and an open-collector driver connecting the transmission part of the corresponding slave device to the input of the transmitter.
    Type: Grant
    Filed: December 11, 1984
    Date of Patent: December 9, 1986
    Assignee: U.S. Philips Corporation
    Inventor: Serge Robert
  • Patent number: 4612413
    Abstract: A reciprocal authentication system between two groups of electronic units which can be interconnected for the exchange of data.The system periodically supplies a variable access key for the encrypting of confidential exchanges.
    Type: Grant
    Filed: July 18, 1984
    Date of Patent: September 16, 1986
    Assignee: U.S. Philips Corporation
    Inventors: Serge Robert, Olivier F. Cahart, Pierre Le Marchant
  • Patent number: 4001781
    Abstract: A space division switching network having a plurality of stages is disclosed for use as part of a time-space-time division switching system. The network employs MOS technology with standard printed circuit boards enabling very compact assembly. To enable a maximum number of stages to be placed on a standard board with appropriate electrical connections to each stage over the standard number of terminals, addresses of crosspoints are supplied in parallel over common address conductors and the appropriate stage is then switched through an enable signal.
    Type: Grant
    Filed: February 18, 1975
    Date of Patent: January 4, 1977
    Assignee: International Standard Electric Corporation
    Inventors: Pierre Charransol, Jacques Hauri, Serge Robert Fontana