Abstract: Apparatuses, systems, methods, and computer program products are disclosed for dynamically resizing logical storage blocks. A controller for a non-volatile storage device includes a block component that determines a total number of available erase blocks of the non-volatile storage device. A controller for a non-volatile storage device includes a size module that determines numbers of erase blocks from available erase blocks to include in each of a plurality of logical blocks as a function of a total number of available erase blocks such that the numbers of erase blocks for each of the logical blocks deviates from each other by less than a predetermined deviation limit. A controller for a non-volatile storage device includes a map module that generates logical blocks for the non-volatile storage device by assigning determined numbers of erase blocks to each of the logical blocks.

Abstract: A storage module and method for on-chip copy gather are provided. In one embodiment, a storage module is provided with a memory comprising a plurality of word lines and a plurality of data latches. The memory copies data from a first word line into a first data latch and copies data from a second word line into a second data latch. The memory then copies only some of the data from the first data latch and only some of the data from the second data latch into a third data latch. After that, the memory copies the data from the third data latch to a third word line. In another embodiment, a storage module is provided comprising a memory and an on-chip copy gather module. Other embodiments are provided.

Abstract: A non-volatile storage system is disclosed that includes non-volatile memory cells designed for high endurance and lower retention than other non-volatile memory cells.

Abstract: A storage module and method for on-chip copy gather are provided. In one embodiment, a storage module is provided with a memory comprising a plurality of word lines and a plurality of data latches. The memory copies data from a first word line into a first data latch and copies data from a second word line into a second data latch. The memory then copies only some of the data from the first data latch and only some of the data from the second data latch into a third data latch. After that, the memory copies the data from the third data latch to a third word line. In another embodiment, a storage module is provided comprising a memory and an on-chip copy gather module. Other embodiments are provided.

Abstract: A non-volatile storage system is disclosed that includes non-volatile memory cells designed for high endurance and lower retention than other non-volatile memory cells.

Abstract: Systems and methods are disclosed to improve the performance of a memory system by freeing up physical memory areas that correspond to logical block address ranges that have repeated data patterns. A controller detects data patterns in incoming data. When a data pattern is detected, the data is not written to non-volatile storage area. Rather, the logical block address range of the data is marked in a data structure as having pattern data. The pattern may also be recorded in the data structure as a pattern descriptor. Because the data having the data pattern is not written to the non-volatile storage area, the freed up corresponding physical memory area may be utilized by the memory system for other purposes, thereby improving the overall performance and endurance of the memory system.