Patents by Inventor Sergei PENIAZ

Sergei PENIAZ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory system for handling program error and method thereof
    Patent number: 11531605
    Abstract: A scheme for handling program errors is provided for a memory system which includes a memory device and a controller including firmware and a memory interface. The firmware issues commands for program operations to the memory interface. After detecting a failed program operation in a particular memory block, the firmware reroutes that program operation to a different location in a different memory block and takes further action to reduce the likelihood of a subsequent error occurring in the same memory block in which the failed program operation occurred.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: December 20, 2022
    Assignee: SK hynix Inc.
    Inventors: Alexander Zapotylok, Sergei Peniaz
  • Remote SSD debug via host/serial interface and method of executing the same
    Patent number: 11532372
    Abstract: Memory systems and method of operating the same enable debugging of a memory system with vendor unique (VU) commands without using a physical cable connection to a debugging port on the memory system. In one aspect, a Universal Asynchronous Receiver-Transmitter (UART) protocol is serialized over a VU host protocol. In another aspect, Joint Test Action Group (JTAG) may be performed over UART or serial advanced technology attachment (SATA).
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: December 20, 2022
    Assignee: SK hynix Inc.
    Inventors: Andrei Konan, Sergei Peniaz
  • MEMORY SYSTEM FOR HANDLING PROGRAM ERROR AND METHOD THEREOF
    Publication number: 20200142793
    Abstract: A scheme for handling program errors is provided for a memory system which includes a memory device and a controller including firmware and a memory interface. The firmware issues commands for program operations to the memory interface. After detecting a failed program operation in a particular memory block, the firmware reroutes that program operation to a different location in a different memory block and takes further action to reduce the likelihood of a subsequent error occurring in the same memory block in which the failed program operation occurred.
    Type: Application
    Filed: November 7, 2019
    Publication date: May 7, 2020
    Inventors: Alexander ZAPOTYLOK, Sergei PENIAZ
  • REMOTE SSD DEBUG VIA HOST/SERIAL INTERFACE AND METHOD OF EXECUTING THE SAME
    Publication number: 20200013476
    Abstract: Memory systems and method of operating the same enable debugging of a memory system with vendor unique (VU) commands without using a physical cable connection to a debugging port on the memory system. In one aspect, a Universal Asynchronous Receiver-Transmitter (UART) protocol is serialized over a VU host protocol. In another aspect, Joint Test Action Group (JTAG) may be performed over UART or serial advanced technology attachment (SATA).
    Type: Application
    Filed: July 5, 2019
    Publication date: January 9, 2020
    Inventors: Andrei KONAN, Sergei PENIAZ