Patents by Inventor Sergej Mutas

Sergej Mutas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9076818
    Abstract: A method for fabricating a semiconductor device includes forming first and second gate structures overlying the semiconductor substrate, and depositing a layer of a silicide-resistant material over the first and second gate structures and over the semiconductor substrate. The method further includes forming sidewall spacers from the layer of silicide-resistant material adjacent the first gate structure and removing the silicide-resistant material adjacent the sidewall spacers to expose the silicon substrate in a source and drain region. Still further, the method includes implanting conductivity determining impurities in the source and drain region, depositing a silicide forming metal, and annealing the semiconductor device to form a silicide in the source and drain region. The silicide-resistant material is not removed from over the second gate structure so as to prevent silicide formation at the second gate structure.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: July 7, 2015
    Assignee: GLOBALFOUNDRIES, INC.
    Inventors: Andreas Kurz, Peter Javorka, Sergej Mutas, Clemens Wündisch
  • Patent number: 8716149
    Abstract: Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate having a gate structure. An atomic layer deposition (ALD) process is performed to deposit a spacer around the gate structure. The ALD process includes alternating flowing ionized radicals of a first precursor across the semiconductor substrate and flowing a chlorosilane precursor across the semiconductor substrate to deposit the spacer.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: May 6, 2014
    Assignee: GlobalFoundries, Inc.
    Inventors: Fabian Koehler, Sergej Mutas, Dina Triyoso, Itasham Hussain
  • Publication number: 20130344673
    Abstract: A method for fabricating a semiconductor device includes forming first and second gate structures overlying the semiconductor substrate, and depositing a layer of a silicide-resistant material over the first and second gate structures and over the semiconductor substrate. The method further includes forming sidewall spacers from the layer of silicide-resistant material adjacent the first gate structure and removing the silicide-resistant material adjacent the sidewall spacers to expose the silicon substrate in a source and drain region. Still further, the method includes implanting conductivity determining impurities in the source and drain region, depositing a silicide forming metal, and annealing the semiconductor device to form a silicide in the source and drain region. The silicide-resistant material is not removed from over the second gate structure so as to prevent silicide formation at the second gate structure.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 26, 2013
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Andreas Kurz, Peter Javorka, Sergej Mutas, Clemens Wündisch
  • Publication number: 20130323923
    Abstract: Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate having a gate structure. An atomic layer deposition (ALD) process is performed to deposit a spacer around the gate structure. The ALD process includes alternating flowing ionized radicals of a first precursor across the semiconductor substrate and flowing a chlorosilane precursor across the semiconductor substrate to deposit the spacer.
    Type: Application
    Filed: May 29, 2012
    Publication date: December 5, 2013
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Fabian Koehler, Sergej Mutas, Dina Triyoso, Itasham Hussain