Abstract: Apparatuses, systems, methods, and computer program products are disclosed for dynamically resizing logical storage blocks. A controller for a non-volatile storage device includes a block component that determines a total number of available erase blocks of the non-volatile storage device. A controller for a non-volatile storage device includes a size module that determines numbers of erase blocks from available erase blocks to include in each of a plurality of logical blocks as a function of a total number of available erase blocks such that the numbers of erase blocks for each of the logical blocks deviates from each other by less than a predetermined deviation limit. A controller for a non-volatile storage device includes a map module that generates logical blocks for the non-volatile storage device by assigning determined numbers of erase blocks to each of the logical blocks.

Abstract: A die assignment scheme assigns data, in the order it is received, to multiple memory dies with some randomness. Randomization events, such as skipping dies or reversing direction, occur at intervals, with a deterministic assignment scheme used between randomization events. Intervals between randomization events may be of random length, or of fixed length.

Abstract: In a Multi Level Cell (MLC) memory array, a burst of data from a host may be written in only lower pages of a block in a rapid manner. Other data from a host may be written in lower and upper pages so that data is more efficiently arranged for long term storage.

Abstract: A die assignment scheme assigns data in the order it is received, to multiple memory dies. Any busy dies are skipped until they become ready again so that the system does not wait for busy dies to become ready. Immediately sequential writes to the same die are prohibited so that reading speed is not impacted.

Abstract: In a Multi Level Cell (MLC) memory array, a burst of data from a host may be written in only lower pages of a block in a rapid manner. Other data from a host may be written in lower and upper pages so that data is more efficiently arranged for long term storage.

Abstract: A die assignment scheme assigns data, in the order it is received, to multiple memory dies with some randomness. Randomization events, such as skipping dies or reversing direction, occur at intervals, with a deterministic assignment scheme used between randomization events. Intervals between randomization events may be of random length, or of fixed length.

Abstract: Systems and methods are disclosed to improve the performance of a memory system by freeing up physical memory areas that correspond to logical block address ranges that have repeated data patterns. A controller detects data patterns in incoming data. When a data pattern is detected, the data is not written to non-volatile storage area. Rather, the logical block address range of the data is marked in a data structure as having pattern data. The pattern may also be recorded in the data structure as a pattern descriptor. Because the data having the data pattern is not written to the non-volatile storage area, the freed up corresponding physical memory area may be utilized by the memory system for other purposes, thereby improving the overall performance and endurance of the memory system.

Abstract: The present invention present methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural improve are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.

Abstract: A die assignment scheme assigns data, in the order it is received, to multiple memory dies with some randomness. Randomization events, such as skipping dies or reversing direction, occur at intervals, with a deterministic assignment scheme used between randomization events. Intervals between randomization events may be of random length, or of fixed length.

Abstract: A die assignment scheme assigns data, in the order it is received, to multiple memory dies with some randomness. Randomization events, such as skipping dies or reversing direction, occur at intervals, with a deterministic assignment scheme used between randomization events. Intervals between randomization events may be of random length, or of fixed length.

Abstract: In a Multi Level Cell (MLC) memory array, a burst of data from a host may be written in only lower pages of a block in a rapid manner. Other data from a host may be written in lower and upper pages so that data is more efficiently arranged for long term storage.

Abstract: In a Multi Level Cell (MLC) memory array, a burst of data from a host may be written in only lower pages of a block in a rapid manner. Other data from a host may be written in lower and upper pages so that data is more efficiently arranged for long term storage.

Abstract: A die assignment scheme assigns data in the order it is received, to multiple memory dies. Any busy dies are skipped until they become ready again so that the system does not wait for busy dies to become ready. Immediately sequential writes to the same die are prohibited so that reading speed is not impacted.

Abstract: A method and system are disclosed for controlling the storage of data in a storage device to reduce fragmentation. The method may include a controller of a storage device receiving data for storage in non-volatile memory, proactively preventing fragmentation by only writing an amount of sequentially addressed logical groups of data into a main storage area of the storage device, such as multi-level cell (MLC) flash memory, and reactively defragmenting data previously written into the MLC memory when a trigger event is reached. The system may include a storage device with a controller configured to perform the method noted above, where the thresholds for minimum sequential writes into MLC, and for scanning the memory for fragmented data and removing fragmentation by re-writing the fragmented data already in MLC into new MLC blocks, may be fixed or variable.

Abstract: Systems and methods for implementing extensions to intelligently manage resources of a mass storage system are disclosed. Generally, a host sends an extension of an enabled set of extensions to a mass storage system that includes at least one of command sequence information, command information or file attribute information. The host additionally sends a host application command to the mass storage system that includes logical block address information associated with the at least one of command sequence information, command information or file attribute information of the extension. Based on the received extension, the mass storage system intelligently performs operations that efficiently manage the resources of the mass storage system to reduce the frequency of operations such as data consolidation operations, data collection operations, and data copy operations, thereby increasing the data programming and reading performance of the mass storage system.

Abstract: The present invention present methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural improve are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.

Abstract: A method and system are disclosed for controlling the storage of data in a storage device to reduce fragmentation. The method may include a controller of a storage device receiving data for storage in non-volatile memory, proactively preventing fragmentation by only writing an amount of sequentially addressed logical groups of data into a main storage area of the storage device, such as multi-level cell (MLC) flash memory, and reactively defragmenting data previously written into the MLC memory when a trigger event is reached. The system may include a storage device with a controller configured to perform the method noted above, where the thresholds for minimum sequential writes into MLC, and for scanning the memory for fragmented data and removing fragmentation by re-writing the fragmented data already in MLC into new MLC blocks, may be fixed or variable.

Abstract: Methods and apparatus for passing information to a host system to suggest logical locations to allocate to a file are disclosed. Generally, when a host system determines a need to allocate a logical location to a file, the host system sends a non-data command to a memory system. In response, the memory system sends information to the host system that includes one or more logical locations to allocate to the file. By suggesting one or more logical locations to allocate to a file, the memory system may reduce a number of data consolidation or garbage collection operations that will need to be performed in the future, thereby improving performance of the memory system.

Abstract: A method and system are disclosed for controlling the storage of data in a storage device to reduce fragmentation. The method may include a controller of a storage device receiving data for storage in non-volatile memory and determining if a threshold amount of data has been received. When the threshold amount of data is received, the non-volatile memory is scanned for sequentially numbered logical groups of data previously written in noncontiguous locations in the non-volatile memory. When a threshold amount of such sequentially numbered logical groups is found, the controller re-writes the sequentially numbered logical groups of data contiguously into a new block. The system may include a storage device with a controller configured to perform the method noted above, where the thresholds for scanning the memory for fragmented data and removing fragmentation by re-writing the fragmented data into new blocks may be fixed or variable.

Abstract: A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual error correction code (ECC) requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data. Data in the identified portion may be copied to another location, or left where it is with an indicator to prohibit further programming to the same cells. To avoid compromising previously stored data during subsequent programming, previously stored data may be backed up. Backing up may be done selectively, for example, only for nonsequential data, or only when the previously stored data contains an earlier version of data being programmed. If a backup copy already exists, another backup copy is not created. Sequential commands are treated as a single command if received within a predetermined time period.