Patents by Inventor Sergey A. Velichko
Sergey A. Velichko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090321799Abstract: A method, apparatus, and system providing a pixel having increased conversion gain by decreasing the size of an output charge storage region to less than that of a photosensor. A pixel readout is executed by multiple sampling signals based on portions of charge transferred from the photosensor to the storage region and combining the sampled signals in either the analog domain or the digital domain into a representative pixel output signal.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Inventors: Sergey A. Velichko, Gennadiy A. Agranov
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Patent number: 7619184Abstract: A method and system for generating control settings for a multi-parameter control system. The interdependencies of processing tools and the related effect on semiconductor wafers within a processing tool is factored into a mathematical model that considers desired and measured wafer quality parameters in the derivation of specific solutions of sets of possible quality parameter adjustments. A selection process determines a set of adjustments such as one that results in minimal changes to the process.Type: GrantFiled: March 4, 2003Date of Patent: November 17, 2009Assignee: Micron Technology, Inc.Inventors: Sergey A. Velichko, Jeffrey S. Nelson, Roger W. Eagans
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Patent number: 7383147Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.Type: GrantFiled: January 30, 2006Date of Patent: June 3, 2008Assignee: Micron Technology, Inc.Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
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Patent number: 7337088Abstract: An intelligent measurement modular semiconductor parametric test system comprises an engine control module. The engine control module is operable to communicate with a user via a user interface, and is further operable to communicate with and to control the state of at least one other module in the semiconductor parametric test system including pluggable modules. The engine control module is further operable to control test flow via a test monitor module based on data and control events received from an intelligent measurement module. Other modules in various embodiments comprise prober monitor modules.Type: GrantFiled: April 25, 2002Date of Patent: February 26, 2008Assignee: Micron Technology, Inc.Inventors: Sergey A. Velichko, Michael J. Dorough, Robert G. Blunn
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Patent number: 7165004Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.Type: GrantFiled: January 30, 2006Date of Patent: January 16, 2007Assignee: Micron Technology, Inc.Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
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Patent number: 7162386Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.Type: GrantFiled: April 25, 2002Date of Patent: January 9, 2007Assignee: Micron Technology, Inc.Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
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Patent number: 7139672Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.Type: GrantFiled: August 24, 2004Date of Patent: November 21, 2006Assignee: Micron Technology, Inc.Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
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Patent number: 7010451Abstract: Methods, systems, and apparatuses provide dynamic creation and modification of wafer test maps. Test plans are defined for a testing session of a wafer lot. The test plan is associated with a number of seed map patterns. During a wafer lot testing session, test results are dynamically obtained and examined at run-time of a test. Moreover, the seed map patterns are overlaid on the test sites defined in the test plan. If the test result statistics are outside of defined threshold tolerance levels, then a new wafer test map is created or modified at run-time, according to corresponding seed map patterns. If seed map patterns are within the intersection of valid test sites, then seed map patterns are created at run-time.Type: GrantFiled: April 17, 2003Date of Patent: March 7, 2006Assignee: Micron Technology, Inc.Inventors: Michael J. Dorough, Robert M. Gravelle, Sergey A. Velichko
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Publication number: 20040210413Abstract: Methods, systems, and apparatuses provide dynamic creation and modification of wafer test maps. Test plans are defined for a testing session of a wafer lot. The test plan is associated with a number of seed map patterns. During a wafer lot testing session, test results are dynamically obtained and examined at run-time of a test. Moreover, the seed map patterns are overlaid on the test sites defined in the test plan. If the test result statistics are outside of defined threshold tolerance levels, then a new wafer test map is created or modified at run-time, according to corresponding seed map patterns. If seed map patterns are within the intersection of valid test sites, then seed map patterns are created at run-time.Type: ApplicationFiled: April 17, 2003Publication date: October 21, 2004Applicant: Micron Technology, Inc.Inventors: Michael J. Dorough, Robert M. Gravelle, Sergey A. Velichko
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Publication number: 20040173599Abstract: A method and system for generating control settings for a multi-parameter control system. The interdependencies of processing tools and the related effect on semiconductor wafers within a processing tool is factored into a mathematical model that considers desired and measured wafer quality parameters in the derivation of specific solutions of sets of possible quality parameter adjustments. A selection process determines a set of adjustments such as one that results in minimal changes to the process.Type: ApplicationFiled: March 4, 2003Publication date: September 9, 2004Inventors: Sergey A. Velichko, Jeffrey S. Nelson, Roger W. Eagans
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Publication number: 20030212523Abstract: An apparatus, method, system, and signal-bearing medium may provide multiple maps, which may include multiple probing sequences to be called upon at run-time based on statistical thresholds or other selected criteria. Each map may include a series of locations on a wafer, the tests to perform at each location, and the measured results of each test. A parametric test system may perform the test at the associated location on the wafer. If the statistical threshold is exceeded or the selected criteria is met, the current map may be abandoned in favor of a different map.Type: ApplicationFiled: April 25, 2002Publication date: November 13, 2003Applicant: Micron Technology, Inc.Inventors: Michael J. Dorough, Robert G. Blunn, Sergey A. Velichko
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Publication number: 20030028343Abstract: An intelligent measurement modular semiconductor parametric test system comprises an engine control module. The engine control module is operable to communicate with a user via a user interface, and is further operable to communicate with and to control the state of at least one other module in the semiconductor parametric test system including pluggable modules. The engine control module is further operable to control test flow via a test monitor module based on data and control events received from an intelligent measurement module. Other modules in various embodiments comprise prober monitor modules.Type: ApplicationFiled: April 25, 2002Publication date: February 6, 2003Applicant: Micron Technology, Inc.Inventors: Sergey A. Velichko, Michael J. Dorough, Robert G. Blunn
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Publication number: 20020152046Abstract: An automated semiconductor parametric test system has a control module that is operable to concurrently control both operation of semiconductor test equipment and operation of parametric test instrumentation. A state oscillator module is controlled by the control module, and further may be operated by the control module in some embodiments to control the state of other system modules in synchronization with other system events. A parametric test equipment module facilitates control of the semiconductor parametric test equipment, and a test instrumentation module facilitates control of the parametric test instrumentation.Type: ApplicationFiled: April 13, 2001Publication date: October 17, 2002Inventors: Sergey A. Velichko, Robert G. Blunn, Michael J. Dorough
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Patent number: 5847276Abstract: A method and apparatus for monitoring characteristics of a fluid contained in a vessel includes a fluid displacer suspended in the vessel. The buoyant force acting on the fluid displacer is measured using a pair of force transducers and used to calculate fluid characteristics such as the height of the fluid in the vessel, fluid density, solute concentration, and/or the presence of fluid cascading from one section of the vessel to another.Type: GrantFiled: October 31, 1997Date of Patent: December 8, 1998Assignee: SCP Global TechnologiesInventors: Victor B. Mimken, Sergey A. Velichko, Tom Krawzak
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Patent number: 5744716Abstract: A method and apparatus for monitoring characteristics of a fluid contained in a vessel includes a pair of triangular fluid displacers suspended in the vessel. The buoyant forces acting on the fluid displacers are measured using force transducers and used to calculate fluid characteristics such as the height of the fluid in the vessel, fluid density, solute concentration, and/or the presence of fluid cascading from one section of the vessel to another.Type: GrantFiled: June 7, 1996Date of Patent: April 28, 1998Assignee: SCP Global Technologies, a division of PRECO, Inc.Inventors: Victor B. Mimken, Sergey A. Velichko, Tom Krawzak