Patents by Inventor Sergey Gaitukevich

Sergey Gaitukevich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230376770
    Abstract: A neural network learning mechanism has a device which perturbs analog neurons to measure an error which results from perturbations at different points within the neural network and modifies weights and biases to converge to a target.
    Type: Application
    Filed: February 8, 2023
    Publication date: November 23, 2023
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDREAS SIBRAI
  • Patent number: 11755850
    Abstract: A multiplier has a MOSFET in a common source configuration. A MOSFET current source is coupled to a drain terminal of the MOSFET. An inverter has an input coupled to the drain terminal of the MOSFET. An output of the inverter gates two currents whose current magnitudes are proportional. A first capacitor has a first terminal coupled to a first of the two currents and a gate of the MOSFET and a second terminal grounded. A second capacitor has a first terminal coupled to a second of the two currents and a second terminal coupled to the first of the two currents. The multiplier is first reset by discharging a gate capacitance of the MOSFET and then allowing it to be recharged to a Vt comparator threshold after which a charge is removed from the gate terminal of the MOSFET reducing a voltage on the gate terminal below the Vt comparator threshold, causing the two currents to be enabled until the Vt comparator threshold reaches a previous Vt comparator threshold and the inverter turns off the two currents.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: September 12, 2023
    Inventors: David Schie, Sergey Gaitukevich, Peter Drabos, Andreas Sibrai, Erik Sibrai
  • Publication number: 20230206077
    Abstract: A neural network learning mechanism has a device which perturbs analog neurons to measure an error which results from perturbations at different points within the neural network and modifies weights and biases to converge to a target.
    Type: Application
    Filed: February 8, 2023
    Publication date: June 29, 2023
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDREAS SIBRAI
  • Publication number: 20230186089
    Abstract: A neural network learning mechanism has a device which perturbs analog neurons to measure an error which results from perturbations at different points within the neural network and modifies weights and biases to converge to a target.
    Type: Application
    Filed: February 7, 2023
    Publication date: June 15, 2023
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDREAS SIBRAI
  • Patent number: 11604996
    Abstract: A neural network learning mechanism has a device which perturbs analog neurons to measure an error which results from perturbations at different points within the neural network and modifies weights and biases to converge to a target.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: March 14, 2023
    Assignee: AIStorm, Inc.
    Inventors: David Schie, Sergey Gaitukevich, Peter Drabos, Andreas Sibrai
  • Publication number: 20230046100
    Abstract: A multiplier has a pair of charge reservoirs. The pair of charge reservoirs are connected in series. A first charge movement device induces charge movement to or from the pair of charge reservoirs at a same rate. A second charge movement device induces charge movement to or from one of the pair of reservoirs, the rate of charge movement programmed to one of add or remove charges at a rate proportional to the first charge movement device. The first charge movement device loads a first charge into a first of the pair of charge reservoirs during a first cycle. The first charge movement device and the second charge movement device remove charges at a proportional rate from the pair of charge reservoirs during a second cycle until the first of the pair of charge reservoirs is depleted of the first charge. The second charge reservoir thereafter holding the multiplied result.
    Type: Application
    Filed: September 29, 2022
    Publication date: February 16, 2023
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDRES SIBRAI, ERIK SIBRAI
  • Publication number: 20230018395
    Abstract: A multiplier has a pair of charge reservoirs. The pair of charge reservoirs are connected in series. A first charge movement device induces charge movement to or from the pair of charge reservoirs at a same rate. A second charge movement device induces charge movement to or from one of the pair of reservoirs, the rate of charge movement programmed to one of add or remove charges at a rate proportional to the first charge movement device. The first charge movement device loads a first charge into a first of the pair of charge reservoirs during a first cycle. The first charge movement device and the second charge movement device remove charges at a proportional rate from the pair of charge reservoirs during a second cycle until the first of the pair of charge reservoirs is depleted of the first charge. The second charge reservoir thereafter holding the multiplied result.
    Type: Application
    Filed: September 29, 2022
    Publication date: January 19, 2023
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDRES SIBRAI, ERIK SIBRAI
  • Patent number: 11494628
    Abstract: A multiplier has a pair of charge reservoirs. The pair of charge reservoirs are connected in series. A first charge movement device induces charge movement to or from the pair of charge reservoirs at a same rate. A second charge movement device induces charge movement to or from one of the pair of reservoirs, the rate of charge movement programmed to one of add or remove charges at a rate proportional to the first charge movement device. The first charge movement device loads a first charge into a first of the pair of charge reservoirs during a first cycle. The first charge movement device and the second charge movement device remove charges at a proportional rate from the pair of charge reservoirs during a second cycle until the first of the pair of charge reservoirs is depleted of the first charge. The second charge reservoir thereafter holding the multiplied result.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: November 8, 2022
    Assignee: AISTORM, INC.
    Inventors: David Schie, Sergey Gaitukevich, Peter Drabos, Andreas Sibrai, Erik Sibrai
  • Publication number: 20210326539
    Abstract: A multiplier has a MOSFET in a common source configuration. A MOSFET current source is coupled to a drain terminal of the MOSFET, An inverter has an input coupled to the drain terminal of the MOSFET. An output of the inverter gates two currents whose current magnitudes are proportional. A first capacitor has a first terminal coupled to a first of the two currents and a gate of the MOSFET and a second terminal grounded. A second capacitor has a first terminal coupled to a second of the two currents and a second terminal coupled to the first of the two currents. The multiplier is first reset by discharging a gate capacitance of the MOSFET and then allowing it to be recharged to a Vt comparator threshold after which a charge is removed from the gate terminal of the MOSFET reducing a voltage on the gate terminal below the Vt comparator threshold, causing the two currents to be enabled until the Vt comparator threshold reaches a previous Vt comparator threshold and the inverter turns off the two currents.
    Type: Application
    Filed: June 29, 2021
    Publication date: October 21, 2021
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDREAS SIBRAI, ERIK SIBRAI
  • Patent number: 11087099
    Abstract: A multiplier has a MOSFET in a common source configuration. A MOSFET current source is coupled to a drain terminal of the MOSFET. An inverter has an input coupled to the drain terminal of the MOSFET. An output of the inverter gates two currents whose current magnitudes are proportional. A first capacitor has a first terminal coupled to a first of the two currents and a gate of the MOSFET and a second terminal grounded. A second capacitor has a first terminal coupled to a second of the two currents and a second terminal coupled to the first of the two currents. The multiplier is first reset by discharging a gate capacitance of the MOSFET and then allowing it to be recharged to a Vt comparator threshold after which a charge is removed from the gate terminal of the MOSFET reducing a voltage on the gate terminal below the Vt comparator threshold, causing the two currents to be enabled until the Vt comparator threshold reaches a previous Vt comparator threshold and the inverter turns off the two currents.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: August 10, 2021
    Assignee: AISTORM, INC.
    Inventors: David Schie, Sergey Gaitukevich, Peter Drabos, Andreas Sibrai, Erik Sibrai
  • Publication number: 20190332929
    Abstract: An event driven device has a network collecting data. A device is coupled to the network for determining changes in the data collected, wherein the device signals the network to process the data collected when the device determines desired changes in the data collected. In a second embodiment a level shift adjusts the band diagram of a spill and fill circuit to allow processing only if a change in input value occurs. This is extended to teach a means by which the subset of an image or incoming audio data might be used to trigger an event. It could also be used for always on operation at lower power than alternative solutions.
    Type: Application
    Filed: April 26, 2019
    Publication date: October 31, 2019
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDREAS SIBRAI
  • Publication number: 20190332459
    Abstract: A neural network learning mechanism has a device which perturbs analog neurons to measure an error which results from perturbations at different points within the neural network and modifies weights and biases to converge to a target.
    Type: Application
    Filed: April 26, 2019
    Publication date: October 31, 2019
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDREAS SIBRAI
  • Publication number: 20190286977
    Abstract: A multiplier has a pair of charge reservoirs. The pair of charge reservoirs are connected in series. A first charge movement device induces charge movement to or from the pair of charge reservoirs at a same rate. A second charge movement device induces charge movement to or from one of the pair of reservoirs, the rate of charge movement programmed to one of add or remove charges at a rate proportional to the first charge movement device. The first charge movement device loads a first charge into a first of the pair of charge reservoirs during a first cycle. The first charge movement device and the second charge movement device remove charges at a proportional rate from the pair of charge reservoirs during a second cycle until the first of the pair of charge reservoirs is depleted of the first charge. The second charge reservoir thereafter holding the multiplied result.
    Type: Application
    Filed: March 4, 2019
    Publication date: September 19, 2019
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDREAS SIBRAI, ERIK SIBRAI
  • Publication number: 20190272395
    Abstract: A multiplier has a MOSFET in a common source configuration. A MOSFET current source is coupled to a drain terminal of the MOSFET. An inverter has an input coupled to the drain terminal of the MOSFET. An output of the inverter gates two currents whose current magnitudes are proportional. A first capacitor has a first terminal coupled to a first of the two currents and a gate of the MOSFET and a second terminal grounded. A second capacitor has a first terminal coupled to a second of the two currents and a second terminal coupled to the first of the two currents. The multiplier is first reset by discharging a gate capacitance of the MOSFET and then allowing it to be recharged to a Vt comparator threshold after which a charge is removed from the gate terminal of the MOSFET reducing a voltage on the gate terminal below the Vt comparator threshold, causing the two currents to be enabled until the Vt comparator threshold reaches a previous Vt comparator threshold and the inverter turns off the two currents.
    Type: Application
    Filed: March 4, 2019
    Publication date: September 5, 2019
    Inventors: DAVID SCHIE, SERGEY GAITUKEVICH, PETER DRABOS, ANDREAS SIBRAI, ERIK SIBRAI
  • Patent number: 8482208
    Abstract: Switching mode power supplies (SMPS) and control methods used thereof are disclosed. An exemplifying SMPS is coupled to control an inductive device. The SMPS comprises a voltage divider and a peak controller. The voltage divider comprises a resistor and a controllable resistor connected in series through a connection node. The resistance of the controllable resistor is variable, controlled by a control signal. The voltage divider generates a limiting signal at the connection node based on a line voltage at a line voltage power node. The peak controller controls a peak current flowing through the inductive device according to the limiting signal.
    Type: Grant
    Filed: May 8, 2011
    Date of Patent: July 9, 2013
    Assignee: Shamrock Micro Devices Corp.
    Inventors: Chien-Liang Lin, Sergey Gaitukevich
  • Publication number: 20120320632
    Abstract: Power switch controllers and methods used therein are disclosed. An exemplifying power switch controller includes a window provider, a sensor and a logic controller. The window provider provides minimum and maximum time signals to indicate the elapses of a minimum time and a maximum time, respectively. The sensor detects a terminal of an inductive device, to generate a trigger signal. The logic controller prevents a power switch connected to the inductive device from being turned on before the elapse of the minimum time, forces the power switch to be turned on after the elapse of the maximum time, and turns on the power switch if the trigger signal is asserted.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 20, 2012
    Applicant: SHAMROCK MICRO DEVICES CORP.
    Inventors: Siarhei Kalodka, Chien-Liang Lin, Sergey Gaitukevich
  • Publication number: 20110291590
    Abstract: Switching mode power supplies (SMPS) and control methods used thereof are disclosed. An exemplifying SMPS is coupled to control an inductive device. The SMPS comprises a voltage divider and a peak controller. The voltage divider comprises a resistor and a controllable resistor connected in series through a connection node. The resistance of the controllable resistor is variable, controlled by a control signal. The voltage divider generates a limiting signal at the connection node based on a line voltage at a line voltage power node. The peak controller controls a peak current flowing through the inductive device according to the limiting signal.
    Type: Application
    Filed: May 8, 2011
    Publication date: December 1, 2011
    Applicant: SHAMROCK MICRO DEVICES CORP.
    Inventors: Chien-Liang Lin, Sergey Gaitukevich
  • Publication number: 20090273376
    Abstract: The present invention discloses AC/DC converters and methods of manufacturing the same. The method includes providing a substrate; forming an oxide layer on a top surface of the substrate; applying a photo-resist layer on the oxide layer to define a well region; performing an ion-implantation in the well region using a dopant; and driving in atoms of the dopant to a depth in the well region through a thermal treatment, wherein the driving in process provides a concentration profile of the dopant in the well region such that the semiconductor structure has a high breakdown voltage.
    Type: Application
    Filed: February 19, 2009
    Publication date: November 5, 2009
    Inventors: Siarhei KALODKA, Sergey Gaitukevich, Vitali Maziarkin, Alan Wang, Chen-Hui Tsay