Patents by Inventor Sergey Karapetyan

Sergey Karapetyan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CT scanner calibration
    Patent number: 11988616
    Abstract: A system and method can determine one or more CT scanner calibration parameters from a plurality of calibration object projections in a plurality of radiographs.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: May 21, 2024
    Assignee: James R. Glidewell Dental Ceramics, Inc.
    Inventors: Sergey Nikolskiy, Fedor Chelnokov, Grant Karapetyan
  • Out-of-view CT scan detection
    Patent number: 11928818
    Abstract: Computer-implemented method and system automatically detects an out-of-view CT scan by receiving a voxel density file, determining a threshold iso-value of density between air density and a material density of one or more scanned objects in the voxel density file, and evaluating, using the threshold iso-value of density, one or more horizontal slices of the voxel density file to determine whether at least a portion of the one or more scanned objects is out of view.
    Type: Grant
    Filed: December 22, 2022
    Date of Patent: March 12, 2024
    Assignee: James R. Glidewell Dental Ceramics, Inc.
    Inventors: Sergey Nikolskiy, Fedor Chelnokov, Grant Karapetyan
  • Various methods and apparatuses for memory modeling using a structural primitive verification for memory compilers
    Patent number: 8112730
    Abstract: A structural primitive verification tool for memory compilers is described. A first set of memory structural primitives are supplied by a designer by filling in fields of a presented user interface. The first set of structural primitives describe certain physical layout features of a proposed memory array in an integrated circuit. A first model of a memory instance derived from the first set of memory structural primitives supplied by the designer is compared to a second model of a memory instance derived from a memory layout file from a memory compiler under-test. The first model is verified against the second model to verify to an integrity of the first set of memory structural primitives supplied by the designer compared to the memory layout file derived from a second set of memory structural primitives configuring that memory instance from the memory compiler.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: February 7, 2012
    Assignee: Synopsys, Inc.
    Inventors: Karen Aleksanyan, Karen Amirkhanyan, Sergey Karapetyan, Alexander Shubat, Samvel Shoukourian, Valery Vardanian, Yervant Zorian
  • VARIOUS METHODS AND APPARATUSES FOR MEMORY MODELING USING A STRUCTURAL PRIMITIVE VERIFICATION FOR MEMORY COMPILERS
    Publication number: 20090106716
    Abstract: A structural primitive verification tool for memory compilers is described. A first set of memory structural primitives are supplied by a designer by filling in fields of a presented user interface. The first set of structural primitives describe certain physical layout features of a proposed memory array in an integrated circuit. A first model of a memory instance derived from the first set of memory structural primitives supplied by the designer is compared to a second model of a memory instance derived from a memory layout file from a memory compiler under-test. The first model is verified against the second model to verify to an integrity of the first set of memory structural primitives supplied by the designer compared to the memory layout file derived from a second set of memory structural primitives configuring that memory instance from the memory compiler.
    Type: Application
    Filed: October 10, 2008
    Publication date: April 23, 2009
    Applicant: Virage Logic Corporation
    Inventors: Karen Aleksanyan, Karen Amirkhanyan, Sergey Karapetyan, Alexander Shubat, Samvel Shoukourian, Valery Vardanian, Yervant Zorian