Patents by Inventor Sergey Olvovsky

Sergey Olvovsky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7089534
    Abstract: An execution engine synchronizes test suite execution to run multiple independent operations concurrently or in parallel. The execution engine operates by stepping through the test suite. At each step it runs the required number of independent operations and waits for their completion. It then checks the results, and continues to the next step of the test suite. If at any step, the actual results are different from the expected results, then the exact sequence that triggered the fault is known. The sequence can be repeated when a correction is provided for the fault. Furthermore, the execution engine allows the user to interactively step through a test case when debugging a fault. A synchronization pattern generator may be incorporated in the system to generate minimal numbers of repetitions of test cases to guarantee varying degrees of interaction coverage.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: August 8, 2006
    Assignee: International Business Machines Corporation
    Inventors: Alan Hartman, Andrei Kirshin, Kenneth Nagin, Sergey Olvovsky, Aviad Zlotnick
  • Patent number: 7024589
    Abstract: A design verification system generates a small set of test cases, from a finite state machine model of the application under test. The finite state machine is reduced by creating efficient samples of the inputs to the application under test which are prepared by combinatorial input parameter selection. The test cases are generated by finite state machine traversal of the reduced state machine, and tests interacting combinations of input parameters in an efficient way. The technique is integrated into a test generator based on a finite state machine. Using an extended language, partial rulesets are employed to instruct the test generator to automatically employ combinatorial input parameter selection during test generation. Another technique for test case generation is disclosed, which uses combinatorial selection algorithms to guarantee coverage of the system under test from the aspect of interaction between stimuli at different stages or transitions in the test case.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: April 4, 2006
    Assignee: International Business Machines Corporation
    Inventors: Alan Hartman, Andrei Kirshin, Kenneth Nagin, Sergey Olvovsky
  • Publication number: 20030233600
    Abstract: A design verification system generates a small set of test cases, from a finite state machine model of the application under test. The finite state machine is reduced by creating efficient samples of the inputs to the application under test which are prepared by combinatorial input parameter selection. The test cases are generated by finite state machine traversal of the reduced state machine, and tests interacting combinations of input parameters in an efficient way. The technique is integrated into a test generator based on a finite state machine. Using an extended language, partial rulesets are employed to instruct the test generator to automatically employ combinatorial input parameter selection during test generation. Another technique for test case generation is disclosed, which uses combinatorial selection algorithms to guarantee coverage of the system under test from the aspect of interaction between stimuli at different stages or transitions in the test case.
    Type: Application
    Filed: June 14, 2002
    Publication date: December 18, 2003
    Applicant: International Business Machines Corporation
    Inventors: Alan Hartman, Andrei Kirshin, Kenneth Nagin, Sergey Olvovsky
  • Publication number: 20030208351
    Abstract: An execution engine synchronizes test suite execution to run multiple independent operations concurrently or in parallel. The execution engine operates by stepping through the test suite. At each step it runs the required number of independent operations and waits for their completion. It then checks the results, and continues to the next step of the test suite. If at any step, the actual results are different from the expected results, then the exact sequence that triggered the fault is known. The sequence can be repeated when a correction is provided for the fault. Furthermore, the execution engine allows the user to interactively step through a test case when debugging a fault. A synchronization pattern generator may be incorporated in the system to generate minimal numbers of repetitions of test cases to guarantee varying degrees of interaction coverage.
    Type: Application
    Filed: May 1, 2002
    Publication date: November 6, 2003
    Inventors: Alan Hartman, Andrei Kirshin, Kenneth Nagin, Sergey Olvovsky, Aviad Zlotnick