Patents by Inventor Sergio Nicolás Deligiannis

Sergio Nicolás Deligiannis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220390257
    Abstract: A sensor, comprising: a processing circuitry configured to: receive a first signal that is generated by a first magnetic field sensing element, the first signal being generated in response to a magnetic field that is indicative of rotation of a target; identify N local maxima of the first signal, where N is a positive integer, and N>1; identify N local minima of the first signal; generate a first offset adjustment signal and a first gain adjustment signal based on: (i) a first sum of the local maxima of the first signal and (ii) a second sum of the local minima of the first signal; and adjust the first signal based on the first offset adjustment signal and the first gain adjustment signal.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 8, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Sergio Nicolás Deligiannis, Nicolás Rigoni
  • Patent number: 11480630
    Abstract: According to some embodiments, a method implemented in electronic circuitry includes: receiving a first signal having a sinusoidal waveform; receiving a second signal having a sinusoidal waveform; generating a composite signal responsive to the first and second signals; determining an orthogonality adjustment coefficient based on a duty cycle of the composite signal; and applying the orthogonality adjustment coefficient to generate an adjusted second signal that is substantially orthogonal to the first signal.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: October 25, 2022
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sergio Nicolás Deligiannis, Nicolás Rigoni
  • Publication number: 20220179013
    Abstract: According to some embodiments, a method implemented in electronic circuitry includes: receiving a first signal having a sinusoidal waveform; receiving a second signal having a sinusoidal waveform; generating a composite signal responsive to the first and second signals; determining an orthogonality adjustment coefficient based on a duty cycle of the composite signal; and applying the orthogonality adjustment coefficient to generate an adjusted second signal that is substantially orthogonal to the first signal.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 9, 2022
    Applicant: Allegro MicroSystems, LLC
    Inventors: Sergio Nicolás Deligiannis, Nicolás Rigoni
  • Patent number: 11128282
    Abstract: A system is provided, comprising: a plurality of flip-flops that are configured to receive a reset signal, each of the plurality of flip-flops having a respective output port, and each of the plurality of flip-flops being configured to assume a respective default state when the reset signal is set to a predetermined value; and a reset monitor circuit that is coupled to the respective output port of each of the plurality of flip-flops, the reset monitor circuit being configured to generate a status signal indicating whether each of the flip-flops has assumed the flip-flop's respective default state after the reset signal is set to the predetermined value, wherein assuming a respective default state by each of the plurality of flip-flops results in a predetermined bit string being stored in the plurality of flip-flops.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: September 21, 2021
    Assignee: Allegro MicroSystems, LLC
    Inventors: Sergio Nicolás Deligiannis, Lucas Intile, Florencia Ferrer
  • Publication number: 20210239758
    Abstract: A system is provided, comprising: a plurality of flip-flops that are configured to receive a reset signal, each of the plurality of flip-flops having a respective output port, and each of the plurality of flip-flops being configured to assume a respective default state when the reset signal is set to a predetermined value; and a reset monitor circuit that is coupled to the respective output port of each of the plurality of flip-flops, the reset monitor circuit being configured to generate a status signal indicating whether each of the flip-flops has assumed the flip-flop's respective default state after the reset signal is set to the predetermined value, wherein assuming a respective default state by each of the plurality of flip-flops results in a predetermined bit string being stored in the plurality of flip-flops.
    Type: Application
    Filed: February 3, 2020
    Publication date: August 5, 2021
    Applicant: Allegro MicroSystems, LLC
    Inventors: Sergio Nicolás Deligiannis, Lucas Intile, Florencia Ferrer