Abstract: An energy-efficient implementation of a WiFi transceiver is proposed in this disclosure. The WiFi transceiver comprises a receive chain comprising a variable receive (Rx) filter circuit and a variable Rx analog-to-digital converter (ADC) circuit. The receive chain is configured to receive a receive signal during a receive mode of operation, having a receive bandwidth associated therewith and receive a transmit signal associated with a transmit chain of the transceiver during a transmit mode of operation, having a transmit bandwidth associated therewith. The WiFi transceiver further comprises a control circuit configured to dynamically adapt a bandwidth of the variable Rx filter and the variable Rx ADC in the receive chain to the receive bandwidth or to the transmit bandwidth, based on the mode of operation.

Abstract: An energy-efficient implementation of a WiFi transceiver is proposed in this disclosure. The WiFi transceiver comprises a receive chain comprising a variable receive (Rx) filter circuit and a variable Rx analog-to-digital converter (ADC) circuit. The receive chain is configured to receive a receive signal during a receive mode of operation, having a receive bandwidth associated therewith and receive a transmit signal associated with a transmit chain of the transceiver during a transmit mode of operation, having a transmit bandwidth associated therewith. The WiFi transceiver further comprises a control circuit configured to dynamically adapt a bandwidth of the variable Rx filter and the variable Rx ADC in the receive chain to the receive bandwidth or to the transmit bandwidth, based on the mode of operation.

Abstract: An energy-efficient implementation of a WiFi transceiver is proposed in this disclosure. The WiFi transceiver comprises a receive chain comprising a variable receive (Rx) filter circuit and a variable Rx analog-to-digital converter (ADC) circuit. The receive chain is configured to receive a receive signal during a receive mode of operation, having a receive bandwidth associated therewith and receive a transmit signal associated with a transmit chain of the transceiver during a transmit mode of operation, having a transmit bandwidth associated therewith. The WiFi transceiver further comprises a control circuit configured to dynamically adapt a bandwidth of the variable Rx filter and the variable Rx ADC in the receive chain to the receive bandwidth or to the transmit bandwidth, based on the mode of operation.

Abstract: An energy-efficient implementation of a WiFi transceiver is proposed in this disclosure. The WiFi transceiver comprises a receive chain comprising a variable receive (Rx) filter circuit and a variable Rx analog-to-digital converter (ADC) circuit. The receive chain is configured to receive a receive signal during a receive mode of operation, having a receive bandwidth associated therewith and receive a transmit signal associated with a transmit chain of the transceiver during a transmit mode of operation, having a transmit bandwidth associated therewith. The WiFi transceiver further comprises a control circuit configured to dynamically adapt a bandwidth of the variable Rx filter and the variable Rx ADC in the receive chain to the receive bandwidth or to the transmit bandwidth, based on the mode of operation.

Abstract: Systems, methods, and circuitries for converting an analog voltage to a digital signal are provided. In one example a method to convert an analog voltage into a binary sequence that represents the voltage includes two modes. In the first mode, in each cycle, values for a next two or more of consecutive most significant bits (MSBs) in the sequence are determined using M comparators, wherein M is equal to or greater than 3. In a second mode, in each cycle, M redundant comparison results are determined using the M comparators. A value for the LSB is determined based on the M redundant values. At an end of conversion, the sequence of N bit values is generated based on the MSBs and the LSB.

Abstract: Analogue filter for filtering out a high-frequency switching noise in a pulse-width-modulated transmit signal, which is fed into a line by a line driver by means of a transformer, wherein at least one capacitor is connected in parallel to a secondary winding of the transformer and, together with a stray inductivity of the transformer, forms the analogue filter.

Abstract: A DC-to-DC converter includes a switching control circuit adapted to provide a control signal having a duty cycle. A switching regulator is adapted to receive both a supply voltage having the first voltage level and the control signal. The switching regulator is further adapted to provide an output signal at the second voltage level as a function of both the supply voltage and the control signal. In addition, a current sensing circuit is adapted to provide at least one alarm signal based the duty cycle of the time-varying signal. Other systems and methods are also disclosed.

Abstract: A driver circuit for driving a transmit signal for a line includes a signal amplifier configured to deliver a transmit signal, present at a signal input of the signal amplifier, amplified with a gain to a signal output, a line interface circuit connected between the signal output of the signal amplifier and the line, and a hybrid circuit connected to the line interface circuit, the hybrid circuit configured to suppress the transmit signal and couple a received signal received via the line to a signal input of the signal amplifier to provide impedance synthesis.

Abstract: Driver circuit for driving a transmit signal for a line comprising a signal amplifier which delivers a transmit signal, present at a signal input of the signal amplifier, amplified with a gain to a signal output, a line interface circuit which is connected between the signal output of the signal amplifier and the line, and comprising a hybrid circuit which is connected to the line interface circuit, wherein the hybrid circuit suppresses the transmit signal and couples a received signal received via the line to a signal input of the signal amplifier for the purpose of impedance synthesis.

Abstract: A DC-to-DC converter includes a switching control circuit adapted to provide a control signal having a duty cycle. A switching regulator is adapted to receive both a supply voltage having the first voltage level and the control signal. The switching regulator is further adapted to provide an output signal at the second voltage level as a function of both the supply voltage and the control signal. In addition, a current sensing circuit is adapted to provide at least one alarm signal based the duty cycle of the time-varying signal. Other systems and methods are also disclosed.

Abstract: A method and a device for amplifying a reception signal are provided, involving the adjustment of a gain by which the reception signal is amplified, in particular as a function of a signal level of the reception signal. For example, lowpass filtering with a variable cutoff frequency is used to filter out a gain-dependent frequency range of the reception signal, which may especially contain an undesirable echo signal. Such a method and such a device are suitable in particular for the reception of ADSL signals in a central office.

Abstract: A self-oscillating pulse-width modulator comprises an input, an output and a control loop. The control loop comprises a forward branch and a feedback loop. The forward branch is connected between the input and the output and comprises a comparator and a delay element. The feedback loop loops back to the input a feedback signal which depends on an output signal present at the output. The phase shift of the open control loop is 180° at the frequency of an oscillation to be generated by the modulator. At least a part of the phase shift is realized in the forward branch by means of the at least one delay element.

Abstract: A synchronization circuit for synchronizing at least two self-oscillating PWM modulators, each outputting a respective pulse-width-modulated output signal comprising signal pulses with signal pulse centers, shifts the timings of the signal pulses relative to one another such that their signal pulse centers are in sync.

Abstract: A pulse width modulator circuit has two self-oscillating pulse width modulators and a synchronization circuit for synchronizing the two self-oscillating pulse width modulators. It also comprises an auxiliary-signal generating circuit for generating an auxiliary signal which is coupled into the two self-oscillating pulse width modulators.

Abstract: A pulse width modulator circuit has two self-oscillating pulse width modulators and a synchronization circuit for synchronizing the two self-oscillating pulse width modulators. It also comprises an auxiliary-signal generating circuit for generating an auxiliary signal which is coupled into the two self-oscillating pulse width modulators.

Abstract: Analogue filter for filtering out a high-frequency switching noise in a pulse-width-modulated transmit signal, which is fed into a line by a line driver by means of a transformer, wherein at least one capacitor is connected in parallel to a secondary winding of the transformer and, together with a stray inductivity of the transformer, forms the analogue filter.

Abstract: A synchronization circuit for synchronizing at least two self-oscillating PWM modulators, each outputting a respective pulse-width-modulated output signal comprising signal pulses with signal pulse centers, shifts the timings of the signal pulses relative to one another such that their signal pulse centers are in sync.

Abstract: A self-oscillating pulse-width modulator comprises an input, an output and a control loop. The control loop comprises a forward branch and a feedback loop. The forward branch is connected between the input and the output and comprises a comparator and a delay element. The feedback loop loops back to the input a feedback signal which depends on an output signal present at the output. The phase shift of the open control loop is 180° at the frequency of an oscillation to be generated by the modulator. At least a part of the phase shift is realized in the forward branch by means of the at least one delay element.

Abstract: Driver circuit for driving a transmit signal for a line comprising a signal amplifier which delivers a transmit signal, present at a signal input of the signal amplifier, amplified with a gain to a signal output, a line interface circuit which is connected between the signal output of the signal amplifier and the line, and comprising a hybrid circuit which is connected to the line interface circuit, wherein the hybrid circuit suppresses the transmit signal and couples a received signal received via the line to a signal input of the signal amplifier for the purpose of impedance synthesis.

Abstract: A method and a device for amplifying a reception signal are provided, involving the adjustment of a gain by which the reception signal is amplified, in particular as a function of a signal level of the reception signal. For example, lowpass filtering with a variable cutoff frequency is used to filter out a gain-dependent frequency range of the reception signal, which may especially contain an undesirable echo signal. Such a method and such a device are suitable in particular for the reception of ADSL signals in a central office.