Abstract: An application processor (AP) includes intellectual property (IP) blocks and a system bus having a first command controller and a second command controller. Each of the first command controller and the second command controller includes a command distributor, a command buffer, and a command arbiter. Each command distributor receives first through third commands from a central processing unit (CPU). Each command buffer sequentially receives a first command and a second command from the command distributor and outputs the first command and the second command at different time slots. Each command arbiter receives the first and second commands from the command buffer and a third command from the command distributor and selectively outputs the same. First data corresponding the first command, second data corresponding to the second command, and a run-marker are stored in the command buffer.