Patents by Inventor Seshadri Vikram

Seshadri Vikram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6770513
    Abstract: An improved arrangement for attaching a heat sink to a flip chip type die is disclosed. More specifically, the heat sink is attached to the back surface of the flip chip die by a metallic solder material. Such an arrangement provides a good thermal conductivity between the die and the heat sink. In some embodiments, the die is mounted on a grid array type substrate in a flip chip arrangement such that the die contacts are coupled to adjacent I/O pads on the substrate. In another aspect, one or more metallic intermediate die attach layers are deposited over the back surface of the die to form a solderable die surface. The heat sink is then attached to the solderable die surface. This approach works well when the chosen solder does not adhere well to the semiconductor die material. In one preferred implementation the intermediate metallic layers include a barrier layer that is deposited over the back surface of the die and a solderable metallic layer that is deposited over the barrier layer.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: August 3, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Seshadri Vikram, William J. Schaefer
  • Patent number: 6356334
    Abstract: Apparatus are disclosed for Liquid Crystal Display (LCD) assemblies having a display device that is attached to a support substrate. The display device includes a die having a pixel array, and a transparent plate positioned over the die. An adhesive seal couples the die to the transparent plate. The seal together with the transparent plate and the die cooperate to define a sealed volume therebetween encompassing the pixel array. A liquid crystal material is disposed within the sealed volume. A support substrate is coupled to the transparent plate for support of the display device such that the die is substantially insulated from transmission of residual stresses induced by or acting upon the support substrate. Methods of reducing residual stresses in LCD assemblies are also provided.
    Type: Grant
    Filed: August 6, 1998
    Date of Patent: March 12, 2002
    Assignee: National Semiconductor Corporation
    Inventors: Ranjan J. Mathew, Seshadri Vikram
  • Patent number: 6031216
    Abstract: A wire bonding apparatus has a first support arrangement for supporting a first integrated circuit package component. A second support arrangement is configured to supporting a second integrated circuit package component. The second support arrangement includes at least a portion of a heating arrangement for heating certain portions of the second component. At least portions of the first support arrangement are thermally insulated from the second support arrangement such that at least certain portions of the first component may be maintained at a temperature substantially lower than the temperature of the heated portions of the second component. The apparatus may be used in method of forming a bonding wire for electrically connecting a first contact on a first integrated circuit package component to a second contact on a second integrated circuit package component. The method includes the steps of supporting and holding the first component and the second component in a desired position.
    Type: Grant
    Filed: June 17, 1998
    Date of Patent: February 29, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Inderjit Singh, Seshadri Vikram
  • Patent number: 5969293
    Abstract: A single gauge lead frame having a second support pad which is substantially a mirror image of a first support pad is disclosed. The second support pad is capable of being placed upon the first support pad. In this manner, the structural and thermally conductive advantages of a dual gauge lead frame is realized at a cost near a single gauge lead frame.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: October 19, 1999
    Assignee: National Semiconductor Corporation
    Inventor: Seshadri Vikram