Patents by Inventor Seshan Sekariapuram

Seshan Sekariapuram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6108239
    Abstract: A compact nonvolatile programmable memory cell. The memory cell has a floating gate (118), control gate (123), drain (108), and source regions (112). The memory cell is an electrically erasable programmable read only memory (EEPROM) cell or a Flash memory cell. Data may be stored the memory cell of the present invention for the required lifetime of the memory cell usage, and data is retained even when power is removed. The memory cell of the present invention has a substantially transverse or vertical channel (140), relative to a surface of a substrate. The memory may be used to create very high-density memory arrays.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: August 22, 2000
    Assignee: Altera Corporation
    Inventors: Seshan Sekariapuram, Raminda U. Madurawe
  • Patent number: 6091102
    Abstract: A compact nonvolatile programmable memory cell. The memory cell has a floating gate (118), control gate (123), drain (108), and source regions (112). The memory cell is an electrically erasable programmable read only memory (EEPROM) cell or a Flash memory cell. Data may be stored the memory cell of the present invention for the required lifetime of the memory cell usage, and data is retained even when power is removed. The memory cell of the present invention has a substantially transverse or vertical channel (140), relative to a surface of a substrate. The memory may be used to create very high-density memory arrays.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: July 18, 2000
    Assignee: Altera Corporation
    Inventors: Seshan Sekariapuram, Raminda U. Madurawe
  • Patent number: 6081449
    Abstract: A compact nonvolatile programmable memory cell. The memory cell has a floating gate (118), control gate (123), drain (108), and source regions (112). The memory cell is an electrically erasable programmable read only memory (EEPROM) cell or a Flash memory cell. Data may be stored the memory cell of the present invention for the required lifetime of the memory cell usage, and data is retained even when power is removed. The memory cell of the present invention has a substantially transverse or vertical channel (140), relative to a surface of a substrate. The memory may be used to create very high-density memory arrays.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: June 27, 2000
    Assignee: Altera Corporation
    Inventors: Seshan Sekariapuram, Raminda U. Madurawe
  • Patent number: 5998263
    Abstract: A compact nonvolatile programmable memory cell. The memory cell has a floating gate (118), control gate (123), drain (108), and source regions (112). The memory cell is an electrically erasable programmable read only memory (EEPROM) cell or a Flash memory cell. Data may be stored the memory cell of the present invention for the required lifetime of the memory cell usage, and data is retained even when power is removed. The memory cell of the present invention has a substantially transverse or vertical channel (140), relative to a surface of a substrate. The memory may be used to create very high-density memory arrays.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: December 7, 1999
    Assignee: Altera Corporation
    Inventors: Seshan Sekariapuram, Raminda U. Madurawe
  • Patent number: 5943267
    Abstract: A compact nonvolatile programmable memory cell. The memory cell has a floating gate (118), control gate (123), drain (108), and source regions (112). The memory cell is an electrically erasable programmable read only memory (EEPROM) cell or a Flash memory cell. Data may be stored the memory cell of the present invention for the required lifetime of the memory cell usage, and data is retained even when power is removed. The memory cell of the present invention has a substantially transverse or vertical channel (140), relative to a surface of a substrate. The memory may be used to create very high-density memory arrays.
    Type: Grant
    Filed: June 12, 1998
    Date of Patent: August 24, 1999
    Assignee: Altera Corporation
    Inventors: Seshan Sekariapuram, Raminda U. Madurawe