Patents by Inventor Seth A. Fortuna

Seth A. Fortuna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8810009
    Abstract: A composition comprises a semiconductor substrate having a crystallographic plane oriented parallel to a surface of the substrate and at least one planar semiconductor nanowire epitaxially disposed on the substrate, where the nanowire is aligned along a crystallographic direction of the substrate parallel to the crystallographic plane. To fabricate a planar semiconductor nanowire, at least one nanoparticle is provided on a semiconductor substrate having a crystallographic plane oriented parallel to a surface of the substrate. The semiconductor substrate is heated within a first temperature window in a processing unit. Semiconductor precursors are added to the processing unit, and a planar semiconductor nanowire is grown from the nanoparticle on the substrate within a second temperature window. The planar semiconductor nanowire grows in a crystallographic direction of the substrate parallel to the crystallographic plane.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: August 19, 2014
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Xiuling Li, Seth A. Fortuna
  • Publication number: 20110121434
    Abstract: A composition comprises a semiconductor substrate having a crystallographic plane oriented parallel to a surface of the substrate and at least one planar semiconductor nanowire epitaxially disposed on the substrate, where the nanowire is aligned along a crystallographic direction of the substrate parallel to the crystallographic plane. To fabricate a planar semiconductor nanowire, at least one nanoparticle is provided on a semiconductor substrate having a crystallographic plane oriented parallel to a surface of the substrate. The semiconductor substrate is heated within a first temperature window in a processing unit. Semi-conductor precursors are added to the processing unit, and a planar semiconductor nanowire is grown from the nanoparticle on the substrate within a second temperature window. The planar semiconductor nanowire grows in a crystallographic direction of the substrate parallel to the crystallographic plane.
    Type: Application
    Filed: April 24, 2009
    Publication date: May 26, 2011
    Inventors: Xiuling Li, Seth A. Fortuna
  • Patent number: 6975184
    Abstract: A material may be removed from the top electrode of a film bulk acoustic resonator to alter the mass loading effect and to adjust the frequency of one film bulk acoustic resonator on a wafer relative to other resonators on the same wafer. Similarly, the piezoelectric layer or the bottom electrode may be selectively milled with a focused ion beam to trim the resonator.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: December 13, 2005
    Assignee: Intel Corporation
    Inventors: Li-Peng Wang, Michael Dibattista, Seth Fortuna, Qing Ma, Valluri Rao
  • Publication number: 20040239450
    Abstract: A material may be removed from the top electrode of a film bulk acoustic resonator to alter the mass loading effect and to adjust the frequency of one film bulk acoustic resonator on a wafer relative to other resonators on the same wafer. Similarly, the piezoelectric layer or the bottom electrode may be selectively milled with a focused ion beam to trim the resonator.
    Type: Application
    Filed: May 30, 2003
    Publication date: December 2, 2004
    Inventors: Li-Peng Wang, Michael Dibattista, Seth Fortuna, Qing Ma, Valluri Rao