Abstract: Match selection circuits are connected to respective ones of match lines connecting corresponding rows of CAM cells associated with word lines. A match selection control circuit, the inputs of which are the word lines, generates match line inhibit signals that inhibit a search when a data search is conducted in the CAM. On the basis of a precharge signal from a control circuit and a match line inhibit signal from the match selection control circuit applied thereto, the match selection circuits inhibit a data search in row-direction CAM cells connected to the match lines that are connected to these match selection circuits, respectively, thereby specifying a data search range in terms of individual word lines. A match line corresponding to each word line in the specified search range attains a non-match state regardless of whether the result of a search is a match or non-match. Thus a data search range is specified by the positions of selected word lines.

Abstract: An asynchronous semiconductor memory operates to detect transition of address to thereby generate a clock. A skew time period can be varied from the transition of an address signal to the generation of an internal clock.