Patents by Inventor Setsuko Kobayashi

Setsuko Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 6246077
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the surface of the first semiconductor layer, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer, a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween, and a pair of third semiconductor layers of the second conductivity type, being in contact with at least the first semiconductor layer and faced each other in a region of the surface of the first semiconductor layer, so that a channel region is formed under the gate electrode.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: June 12, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Setsuko Kobayashi, Takashi Shinohe, Tomoki Inoue, Akihiro Yahata
  • Semiconductor device
    Patent number: 5977564
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the surface of the first semiconductor layer, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer, a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween, and a pair of third semiconductor layers of the second conductivity type, being in contact with at least the first semiconductor layer and faced each other in a region of the surface of the first semiconductor layer, so that a channel region is formed under the gate electrode.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: November 2, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Setsuko Kobayashi, Takashi Shinohe, Tomoki Inoue, Akihiro Yahata