Patents by Inventor Setsuo Wake

Setsuo Wake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cleaning method with hydrochloric acid-hydrogen peroxide mixture
    Patent number: 6214129
    Abstract: A cleaning method to inhibit the adhesion of micro particles to a member to be cleaned by decreasing an amount of generation of bubbles. In a method for cleaning a member to be cleaned by dipping the member into a cleaning bath to which a hydrochloric acid-hydrogen peroxide mixture comprising hydrochloric acid, hydrogen peroxide and water is supplied through a filter and a supplying port; the improvement is that a temperature of the hydrochloric acid, hydrogen peroxide mixture is controlled within the range of 20°to 45° C.
    Type: Grant
    Filed: October 22, 1998
    Date of Patent: April 10, 2001
    Inventors: Yasuyuki Nakaoka, Setsuo Wake, Kazuyuki Kan, Muneyuki Ishimura
  • Electrically erasable and programmable semiconductor memory device with trench memory transistor and manufacturing method of the same
    Patent number: 5460989
    Abstract: A p-type silicon substrate 1 is provided with a trench 11. A second gate oxide film 4 is formed on a bottom wall 11a of the trench. The trench has a side wall 11b on which a first gate oxide film 9 is formed. A thickness of the second gate oxide film 4 is smaller than that of the first gate oxide film 9. A floating gate electrode 5 is formed on the second and first gate oxide films 4 and 9. At the vicinities of the opposite ends of the floating gate electrode 5, there are formed an n.sup.+ -drain diffusion region 2 and n.sup.+ -source diffusion region 3. A control gate electrode 7 is formed over the floating gate electrode 5 with an layer insulating film 6 interposed therebetween. In an electrically programmable and erasable semiconductor memory device (EEPROM) of a flash type, a writing efficiency is improved, a reliability is improved with respect to quality control, and dimensions of memory transistors are reduced.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: October 24, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Setsuo Wake
  • Electrically erasable and programmable semiconductor memory device with trench memory transistor and manufacturing method of the same
    Patent number: 5338953
    Abstract: A p-type silicon substrate 1 is provided with a trench 11. A second gate oxide film 4 is formed on a bottom wall 11a of the trench. The trench has a side wall 11b on which a first gate oxide film 9 is formed. A thickness of the second gate oxide film 4 is smaller than that of the first gate oxide film 9. A floating gate electrode 5 is formed on the second and first gate oxide films 4 and 9. At the vicinities of the opposite ends of the floating gate electrode 5, there are formed an n.sup.+ -drain diffusion region 2 and n.sup.+ -source diffusion region 3. A control gate electrode 7 is formed over the floating gate electrode 5 with an layer insulating film 6 interposed therebetween. In an electrically programmable and erasable semiconductor memory device (EEPROM) of a flash type, a writing efficiency is improved, a reliability is improved with respect to quality control, and dimensions of memory transistors are reduced.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: August 16, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Setsuo Wake